Time-delay circuit

Details Time-delay circuit Time-delay circuit

2005-02-09

2008-09-16

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S284000

Reexamination Certificate

active

07425857

ABSTRACT:
A time delay logic comprises a first stage with an inverter, a capacitor connected to the input terminal of the inverter, a constant current generator and an electronic switch controlled by an input pulse. The capacitor begins to charge at a predetermined edge of the input pulse and brings the input terminal of the inverter from a first voltage (ground) to the switching threshold voltage of the inverter, so that on the output terminal of the inverter there is obtained a pulse having an edge that, as referred to the predetermined edge of the input pulse, has a delay time that depends on the inverter threshold. The circuit comprises a second stage, coupled with the first, that is a dual circuit of the circuit of the first stage and has an inverter equal to the one of the first stage.

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U. Tietze, Ch. Schenk, “Halbleiter-Schaltungstechnik 10.Auflage,”Springer Verlag561846, pp. 232-236, 1993. XP002288569.

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