Time delay apparatus and method of using same

Details Time delay apparatus and method of using same Time delay apparatus and method of using same

2008-05-31

2010-02-23

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S359000

Reexamination Certificate

active

07667515

ABSTRACT:
Disclosed is a time delay generator200apparatus and method. The apparatus includes a time delay gate212, a mixer216(a Gilbert cell circuit), and a current digital to analog converter206. The mixer216, comprised of first and second transistor differential pairs218and220, receives an analog input signal202without a delay as well as a delayed input signal210produced by the time gate delay. The digital to analog converter regulates the relative current flow between a first control signal232and a second control signal238, effectively altering the mixing of the undelayed input signal208and the delayed input signal210to generate a delayed output signal214with a time or phase delay substantially equal to the temporal delay represented by the digital signal input204. The time delay generator exhibits reduced phase noise and a linear time delay response.

REFERENCES:
patent: 4797586 (1989-01-01), Traa
M. Chua and K. W. Martin, “1 GHz Programmable Analog Phase Shifter for Adaptive Antennas”, IEEE 1998 Custom IC Conference, p. 71, 1998.
T. Otsuji, et al., “A 3-ns Range, 8-ps Resolution, Timing Generator LSI Utilizing Si Bipolar Gate Array,” IEEE Journal of Solid-State Circuits, vol. 26, No. 5, May 1991.
T. Otsuji and N. Narumi, “A 10-ps Resolution, Process-Insensitive Timing Generator IC”, IEEE J. Solid-State Circuits, vol. 24, No. 5, Oct. 1989.
T. Keaton et al., “A compression framework for content analysis,” Proceedings of IEEE Workshop on Content-Based Access of Image and Video, Fort Collins, CO, USA, Jun. 22, 1999.
S. Nitta, et al., “A Variable Delay Generator for DESKEW IC using ECL Gate Array”, Symp. On VSLI Circuits, 1991.
P. A. Dawson and S. P. Rogerson, “An Undersea Fiber-Optic Regenerator Using and Integral-Substrate Package and Flip-Chip SAW Mounting”, J. Lightwave Technology , vol. LT-2, No. 6, Dec. 1984.
L. Schmidt and H. Rein, “Continuously Variable Gigahertz Phase-Shifter IC Covering more than one Freq. Decade”, IEEE J. Solid-State Circuits, vol. 27, No. 6, Jun. 1992.
A. Vellaikal, et al., “Joint spatial-spectral indexing for imgae retrieval,” IEEE International Conference on Image Processing, v. 3, Sep. 16-19, 1996, pp. 867-870.
N. Vasconcelos, et al., “Library-based coding: a representation for efficient video compression and retrieval,” Data Compression Conference Proceedings, Mar. 25-27, 1997, pp. 121-130.
J-W. Nahm, et al., “Optimized Encoder Design Algorithm for Joint Compression and Recognition,” SPIE, vol. 2484, pp. 236-245.
B. Walls, et al., “Performance of the MACH filter and DCCF algorithms in the presence of data compression,” Raytheon Missle Systems Company.
A. Pentland, et al., “Photobook: contenet-based manipulation of image databases,” International Journal of Computer Vision 18, Jun. 3, 1996, Kulwer Academic Publishers, pp. 223-254, 0920-5691.
C. Liu, et al., “Robust coding schemes for indexing and retrieval from large face databases,” IEEE Transactions on Image Processing, vol. 9, No. 1, Jan. 2000, pp. 132-137.
EP 0302 262 A2; Feb. 8, 1989; Tektronix, Inc.
EP 0317 758 A2; May 31, 1989; Tektronix, Inc.
EP 0317 759 A2; May 31, 1989; Tektronix, Inc.
EP 0964516 A1; Dec. 15, 1999; Hewlett-Packard Company.

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