Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2007-03-26
2008-10-28
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S155000
Reexamination Certificate
active
07443332
ABSTRACT:
A Sampled Pipeline Subranging Converter (SPSC) may include at least one stage—e.g. at least the input stage—operating in a time-continuous fashion. In the time continuous input stage, the analog input may be processed in two parallel paths. A lower path may comprise a track-and-hold (T/H) element, an Analog-to-Digital-Converter (ADC) and a Digital-to-Analog-Converter (DAC). The T/H element may be optional and may be present if required by the ADC. The signal entering the lower path may be sampled at the desired conversion rate. The time continuous stage(s) may additionally be configured with an upper path that includes a delay element configured to receive the analog input, a Low-Pass (LP) filter coupled to the delay element, and an anti alias filter. The output generated by the DAC may be subtracted from the output of the LP filter, and the resulting difference signal may be provided to the anti alias filter, which in turn may generate the residue (or error) output. The digital output of the time continuous converter may be calculated by combining the digital outputs of the various sections.
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Hood Jeffrey C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
National Instruments Corporation
Young Brian
LandOfFree
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