Time-base implementation for correcting accumulative error...

Details Time-base implementation for correcting accumulative error... Time-base implementation for correcting accumulative error...

2005-11-22

2005-11-22

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S160000

Reexamination Certificate

active

06967510

ABSTRACT:
The present invention provides for supporting an on chip-timer facility and, more particularly, to the generation of a constant time incremental increase while changing core mesh-clock frequency. A latch is coupled to the output of a first free-running clock. An inverter is coupled to the output of the first latch. At least one other secondary latch is coupled to the output of the first latch. An edge detector is coupled to the output of the secondary latch. An incrementer or decrementer is coupled to the output of the edge detector. A memory is coupled to the output of the incrementer or decrementer.

REFERENCES:
patent: 5459419 (1995-10-01), Hatakenaka
patent: 5982833 (1999-11-01), Waters
patent: 6239635 (2001-05-01), Matsuzaki

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