Time base correction circuit

Details Time base correction circuit Time base correction circuit

1985-02-27

1987-09-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307606, 307271, 360 361, 358320, 358337, H03K 117, H03K 513, H04N 578, H04N 989

Patent

active

046927085

ABSTRACT:
A time base correction circuit for correcting time base error commonly present in two or more signals having components in different frequency bands, wherein the number of stages of the respective clock response delay elements is reduced. A single clock generator supplies clock pulse signals for plural clock response delay elements. The clock generator output is connected directly to the clock response delay element to which is applied the input signal having the highest frequency component. Frequency dividers are connected between the clock generator and each of the other clock response delay elements.

REFERENCES:
patent: 4283696 (1981-08-01), Goser
patent: 4532541 (1985-07-01), Cooper
patent: 4555734 (1985-11-01), Fukui
Sadashige, "Overview of Time-Base Correction Techniques and Their Applications", Oct. 1976, vol. 85, No. 10, pp. 787-791, SMPTE Journal.
Acker, "Digital Time-Base Correction for Video Signal Processing", Mar. 1976, vol. 85, pp. 146-149, SMPTE Journal.

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