Computer graphics processing and selective visual display system – Plural display systems – Tiling or modular adjacent displays
Reexamination Certificate
1999-01-06
2001-07-17
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural display systems
Tiling or modular adjacent displays
C345S005000, C345S087000, C349S073000
Reexamination Certificate
active
06262696
ABSTRACT:
FIELD OF THE INVENTION
The invention pertains to the field of flat panel displays, and, more particularly, to large, monolithically addressed, flat panel displays made up of a plurality of smaller display “tiles” with capability in the range of 12 or more lines per inch.
BACKGROUND OF THE INVENTION
The ultimate television set will hang on the living room wall like a picture, and be at most a few inches thick. The most promising technology in this field today is the liquid crystal display (LCD). Liquid crystal displays have been commercially available for more than 20 years, but until recently have been restricted to relatively small size. Such displays are ubiquitous in watches, calculators, radios, and other products requiring indicators and some small number of alphanumeric characters. Recently, improvements in liquid crystal technology has occurred, allowing larger high line density displays to be manufactured. These have achieved widespread acceptance in portable computers, very light laptop computers, and dedicated word processors. Other products include flat screen and projection television systems. Additional improvements in the technology have led to full color displays, which are now in production.
The original LCD technology, commonly used in watches and calculators and the like, was termed “passive matrix”. Row and column lines were energized to activate a specific LCD spot (picture element or “pixel”) at the intersection of the row and column. The display was continually scanned to turn each pixel on or off as needed.
The more modern technique, currently used in most laptops, includes the addition of active switches to control the action of the liquid crystal at each picture element or pixel. The active switch can be a thin film diode or a thin film transistor, and, for large displays, the number of active elements approaches the number of transistors in a dynamic memory chip. These displays are termed “Active Matrix Liquid Crystal Displays” or “AMLCD”. The result is higher speed, higher contrast, and higher overall brightness. The use of these active devices to control “light valves” greatly simplifies the electronics of the display, but the cost of these improvements is the added fabrication sequence to deposit the active devices at each pixel, and the need for leads to each device, a total of hundreds of thousands of devices for each display.
The keys to the economical production of AMLCD are the yield of the complex sequential process and the number of displays that may be cut from a panel.
A common problem in the manufacture of large area panel displays is that of a relatively low yield. This is usually expressed in defects per unit area; for example, 0.01 defects/cm
2
corresponds approximately with 1993 manufacturing practice in Japan (see
Liquid Crystal Flat Panel Displays
, William C. O'Mara, 1993, p. 105). At this defect level, the yield for a 10″ diagonal display, common in laptop computers, is about 90% at best, which results in a cost of $500-$1,000 per display. The larger the display, the lower the yield, using conventional technology. If a 10″ display has a yield of 80%, a 35″ display (approximately 12 times larger in area) would have a yield of 0.812, or 6%, or six good displays out of one hundred, without rework or repair. Large-screen TVs of 25-35″ diagonal would not be economical with such a yield rate and current production methods. First generation panels are currently available up to about 17″ in size. Second generation panels, expected by about 1996, will be up to around 21″, while third generation panels, some 5-10 years in the future, may be expected to be as much as 29″.
To reach larger sizes where monolithics are not economical due to the problems discussed above, a plurality of relatively small “tile” displays can be connected together in precise alignment to form the larger display, one suitable alignment technique being described in copending U.S. patent application Ser. No. 08/297,958, filed Aug. 31, 1994. Sharp, a Japanese display manufacturer, has recently announced a tiling product which fails to meet the requirement of uniformly periodic pixel spacing. In tiled displays, each of the tiles may be individually tested before assembly, and defective tiles discarded. The yield loss is then due only to the assembly operations and factors relating to system performance specifications. Furthermore, the assembly may be designed to be reworkable by removal and replacement of tiles.
The present invention relates, in general, to a method for making these tiled displays for use in large area panel displays, and more particularly to a technique for producing and assembling such small display tiles into a large area display and selectively electrically interconnecting the tiles while at the same time mechanically positioning them to meet the desired optical specifications.
This disclosure describes a unique approach to the design and fabrication of flat panel displays through the utilization of innovative interconnection designs and assembly technology, some of which are adapted from state of the art assembly of semiconductors and enhanced to account for optical as well as electronic specifications.
In AMLCD flat panel displays that are lighted from the back, all pixel locations must be spaced center to center with a uniform periodicity, and lighting intensity must be uniform. In addition, the solid angle of light being emitted from each pixel should be large and uniform. Moreover, the electrical lines for each pixel cannot obstruct the light-transmitting part of the light valve (the switchable section of the LCD display which actually forms the pixel).
These specifications are all new to display technology, requiring careful design and technology improvements to handle precise locations of the pixels and to achieve continuity in observed pixel spacing from tile to tile.
New packaging designs and processes to enhance tiling capability described herein will allow displays to be made that are much larger than monolithic displays.
Within a tile, maintaining the interpixel spacing and routing the electrical connections is a function of the monolithic fabrication process, but at the perimeter the tile must be connected to neighboring tiles. In semiconductor manufacturing, this edge space (known as a “kerf” area) is generally wasted to accommodate bonding sites and room for cutting. In tiled optical displays, however, neighboring pixels on neighboring tiles must appear to the eye to be the same size as all others and must have uniformly periodic spacing within each tile, and across the tile boundaries. There is little room for a kerf.
SUMMARY OF THE INVENTION
In accordance with the present invention, the manufacturing yield for large area high line density flat panel displays is significantly improved by utilizing a large number of small area displays mounted on a common substrate and electrically interconnected to replicate the function of a large area display. The entire display is “monolithically addressed”—that is, treated as if it were a single monolithic display, rather than made up of smaller tile subunits. In a preferred embodiment, area array solder joints are used to mechanically align and assemble a multiplicity of small area display elements, or tiles, into a large display, with the solder joints also serving to provide electrical interconnections. In another preferred embodiment the solder joints are replaced by interconnections made of conductive adhesive. For tiled displays where all tiles can have an edge on the perimeter of the display (i.e., there are no “inside” tiles), adhesive assembly may be preferred, the tiles being addressed through the perimeter of the display. For backlit applications, the necessary interconnections within a tile and across tiles are maintained in the spaces between light valve elements so as not to obstruct light transmission through the light valve.
The most difficult problem addressed by the invention is along the edges of the tiles. At the intersections of
Krusius J. Peter
Li Che-Yu
Seraphim Donald P.
Hjerpe Richard
Nguyen Kimnhung
Rainbow Displays Inc.
Salzman & Levy
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