Tileable gate array cell for programmable logic devices and gate

Details Tileable gate array cell for programmable logic devices and gate Tileable gate array cell for programmable logic devices and gate

1995-05-01

1996-05-21

Teska, Kevin J.

Boots, shoes, and leggings

364488, 364489, 326 38, G06F 1750

Patent

active

055196292

ABSTRACT:
A logic and routing cell for constructing a programmable gate array. The gate array may be constructed by tiling a wafer surface with this single logic and routing cell design. The logic and routing cell includes both the logic cell and the routing circuitry needed to connect that logic cell to all levels of a hierarchical routing system for making connections between the various logic cells.

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