Boots – shoes – and leggings
Patent
1995-05-01
1996-05-21
Teska, Kevin J.
Boots, shoes, and leggings
364488, 364489, 326 38, G06F 1750
Patent
active
055196292
ABSTRACT:
A logic and routing cell for constructing a programmable gate array. The gate array may be constructed by tiling a wafer surface with this single logic and routing cell design. The logic and routing cell includes both the logic cell and the routing circuitry needed to connect that logic cell to all levels of a hierarchical routing system for making connections between the various logic cells.
REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: Re34444 (1993-11-01), Kaplinsky
patent: 4642487 (1987-02-01), Carter
patent: 4706216 (1987-11-01), Carter
patent: 4758985 (1988-07-01), Carter
patent: 4775942 (1988-10-01), Ferreri et al.
patent: 4922441 (1990-05-01), Tsukagoshi et al.
patent: 5036473 (1991-07-01), Butts et al.
patent: 5109353 (1992-04-01), Sample et al.
patent: 5122685 (1992-06-01), Chan et al.
patent: 5140193 (1992-08-01), Freeman et al.
patent: 5208491 (1993-05-01), Ebeling et al.
patent: 5255203 (1993-10-01), Agrawal et al.
patent: 5260881 (1993-11-01), Agrawal et al.
patent: 5313119 (1994-05-01), Cooke et al.
patent: 5323069 (1994-06-01), Smith, Jr.
patent: 5329460 (1994-07-01), Agrawal et al.
P. K. Chan, M. D. F. Schlag, "Architectural Tradeoffs in Field-Programmable-Device-Based Computing Systems", 1993 IEEE, pp. 152-161.
J. F. McDonald et al., "Wafer Scale Integration (WSI) of Programmable Gate Arrays (PGA's)", 1990 IEEE, pp. 329-337.
T. Kean et al. "Implementation of Configurable Hardware Using Wafer Scale Integration" 1990 IEEE, pp. 68-73.
J. P. Gray, T. A. Kean "Configurable Hardware: A New Paradigm for Computation" 1989 Decennial Caltech Conference, pp. 1-17.
T. Kean, J. Gray "Configurable Hardware: Two Case Studies of Micro-Grain Computation" 1989 International Conference on Systolic Arrays, pp. 1-10.
P. Bertin et al. "Introduction to Programmable Active Memories", 1989 Digital PRL, pp. 1-9.
S. Monaghan, P. D. Noakes "Reconfigurable special purpose hardware for scientific computation and simulation", 1992 Computing & Control Engineering Journal, pp. 225-234.
N. Howard, R. W. Taylor "Reconfigurable logic: technology and applications", 1992 Computing & Control Engineering Journal, pp. 235-240.
D. D. Hill, D. R. Cassiday "Preliminary Description of Tabula Rasa, an Electrically Reconfigurable Hardware Engine" 1990 IEEE, pp. 391-395.
D. W. Van den Bout et al. "AnyBoard: An FPGA-Based, Reconfigurable System" 1992 IEEE, pp. 21-30.
J. Vitanen, T. Kean "Image Pattern Recognition Using Configurable Logic Cell Arrays", 1989 CG International 7th Annual Conference of the Computer Graphics Society (CGS), pp. 355-368.
T. Kean et al. "A Novel Implementation Style for Teaching VLSI" 1989 VLSI Education Conference and Exposition.
Yee, Jenny, "Programmierbare Logik mit Flexibler Ausgangsarchitektur", Elektronik Industrie 9, 1985, pp. 43-48.
Garbowski Leigh Marie
Hewlett--Packard Company
Teska Kevin J.
LandOfFree
Tileable gate array cell for programmable logic devices and gate does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Tileable gate array cell for programmable logic devices and gate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Tileable gate array cell for programmable logic devices and gate will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2043855