Thyristor-based semiconductor memory device with back-gate bias

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Combined with other solid-state active device in integrated...

Reexamination Certificate

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Details

C438S133000, C363S027000, C365S094000, C365S104000, C365S105000

Reexamination Certificate

active

07859012

ABSTRACT:
In accordance with an embodiment of the present invention, a semiconductor memory device includes an array of thyristor-based memory formed in a silicon-on-insulator (SOI) supporting substrate. A portion of the supporting structure of the SOI substrate has a density of dopants sufficient to assist delivery of a bias to the backside of an insulating layer beneath a thyristor of the thyristor-based semiconductor memory. By enabling biasing of the substrate at the backside of the insulating layer beneath the thyristor, a back-gate control is available for controlling or compensating the gain of a component bipolar device of the thyristor with respect to temperature.

REFERENCES:
patent: 6888176 (2005-05-01), Horch et al.

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