Semiconductor device manufacturing: process – Making regenerative-type switching device – Having field effect structure
Reexamination Certificate
2006-07-15
2009-02-10
Dang, Phuc T (Department: 2892)
Semiconductor device manufacturing: process
Making regenerative-type switching device
Having field effect structure
C438S133000, C257S107000
Reexamination Certificate
active
07488627
ABSTRACT:
A thyristor-based memory may comprise a thyristor accessible via an access transistor. A temperature dependent bias may be applied to at least one of a supporting substrate and an electrode capacitively-coupled to a base region of the thyristor. The voltage level of the adaptive bias may change with respect to temperature and may influence and/or compensate an inherent bipolar gain of the thyristor in accordance with the change in bias and may enhance its performance and/or reliability over a range of operating temperature. In a particular embodiment, the thyristor may be formed in a layer of silicon of an SOI substrate and the adaptive bias coupled to a supporting substrate of the SOI structure.
REFERENCES:
patent: 3812405 (1974-05-01), Clark
patent: 4210827 (1980-07-01), Kanazawa et al.
patent: 4480312 (1984-10-01), Wingate
patent: 4829357 (1989-05-01), Kasahara
patent: 4965872 (1990-10-01), Vasudev
patent: 5424563 (1995-06-01), Temple et al.
patent: 5448104 (1995-09-01), Yallup
patent: 5627401 (1997-05-01), Yallup
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6448586 (2002-09-01), Nemati et al.
patent: 6462359 (2002-10-01), Nemati et al.
patent: 6492662 (2002-12-01), Hsu et al.
patent: 6512274 (2003-01-01), King et al.
patent: 6528356 (2003-03-01), Nemati et al.
patent: 6545297 (2003-04-01), Noble, Jr. et al.
patent: 6552398 (2003-04-01), Hsu et al.
patent: 6583452 (2003-06-01), Cho et al.
patent: 6611452 (2003-08-01), Han
patent: 6627924 (2003-09-01), Hsu et al.
patent: 6888176 (2005-05-01), Horch et al.
patent: 6913955 (2005-07-01), Horch et al.
Farid Nemati et al., U.S. Appl. No. 10/706,162, filed Nov. 12, 2003, “Thyristor Circuit and Approach for Temperature Stability,” assigned to the assignee of the present application.
F. Nemati and J.D. Plummer, “A Novel High Density, Low Voltage SRAM Cell with a Vertical NDR Device,” VLSI Technology Digest, 1998.
F. Nemati and J.D. Plummer, “A Novel Thyristor-Based SRAM Cell (T-RAM) for High-Speed, Low-Voltage, Giga-Scale Memories”, International Electronic Device Meeting Technical Digest, 1999.
National Scientific Corp., “TMOS Memory Cell, Breakthrough Technology in SRAM”, at www.nsclocators.com/images/pdf/IP—tmos-2003.PDF, 2003.
R. Colin Johnson, “Hybrid Tunnel Diodes Could Leapfrog Moore's Law,” EE Times, Oct. 29, 2003, also at www.eetimes.com/at
ews/OEG20031029S0015.
Nemati Farid
Yang Kevin J.
Dang Phuc T
Fields IP, PS
T-RAM Semiconductor, Inc.
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