Thyristor-based memory and its method of operation

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Lateral structure

Reexamination Certificate

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C257SE29221

Reexamination Certificate

active

10947794

ABSTRACT:
A semiconductor may contain a plurality of circuits each comprising at least one thyristor having a base region. The base region of at least one of the thyristors has a different doping profile than the others. When a bias circuit is used to bias the thyristors, the effect of biasing on the thyristors is found to be affected by the doping profile. In a specific embodiment, the doping concentration is higher near an electrode of the thyristor than near a supporting substrate. The different doping profiles can be achieved by using different ion implant energies.

REFERENCES:
patent: 4965872 (1990-10-01), Vasudev
patent: 5448104 (1995-09-01), Yallup
patent: 5463231 (1995-10-01), Ogura et al.
patent: 5627401 (1997-05-01), Yallup
patent: 6104045 (2000-08-01), Forbes et al.
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6448586 (2002-09-01), Nemati et al.
patent: 6462359 (2002-10-01), Nemati et al.
patent: 6492662 (2002-12-01), Hsu et al.
patent: 6512274 (2003-01-01), King et al.
patent: 6528356 (2003-03-01), Nemati et al.
patent: 6545297 (2003-04-01), Noble, Jr. et al.
patent: 6552398 (2003-04-01), Hsu et al.
patent: 6583452 (2003-06-01), Cho et al.
patent: 6611452 (2003-08-01), Han
patent: 6627924 (2003-09-01), Hsu et al.
patent: 6639284 (2003-10-01), Chatterjee et al.
patent: 6998651 (2006-02-01), Vashohenko et al.
patent: 2001/0025961 (2001-10-01), Nakamura et al.
Farid Nemati, et al., U.S. Appl. No. 10/706,162 filed Nov. 12, 2003, Thyristor Circuit and Approach for Temperature Stability, assigned to the assignee of the present application.
F. Nemati and J. D. Plummer, A Novel High Density, Low voltage SRAM Cell with a Vertical NDR Device, VLSI Technology Technical Digest, Jun. 1998.
F. Nemati and J. D. Plummer, A Novel Thyristor-Based SRAM Cell (T-RAM) for High Speed, Low Voltage, Giga-Scale Memories, International Electron Device Meeting Technical Digest, 1999.
National Scientific Corp., TMOS Memory Cell, Breakthrough Technology in SRAM, at http://www.nsclocators.com/images/pdf/IP—tmos-2003.PDF, 2003.
R. Colin Johnson, Hybrid Tunnel Diodes Could Leapfrog Moore's Law, EE Times, Oct. 29, 2003, also at www.eetimes.com/at
ews/OEG20031029S0015.

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