Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device
Reexamination Certificate
2006-07-18
2006-07-18
Dang, Phuc T. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
C257S162000, C365S180000
Reexamination Certificate
active
07078739
ABSTRACT:
A thyristor-based memory may comprise a thyristor accessible via an access transistor. A temperature dependent bias may be applied to at least one of a supporting substrate and an electrode capacitively-coupled to a base region of the thyristor. The voltage level of the adaptive bias may change with respect to temperature and may influence and/or compensate an inherent bipolar gain of the thyristor in accordance with the change in bias and may enhance its performance and/or reliability over a range of operating temperature. In a particular embodiment, the thyristor may be formed in a layer of silicon of an SOI substrate and the adaptive bias coupled to a supporting substrate of the SOI structure.
REFERENCES:
patent: 4829357 (1989-05-01), Kasahara
patent: 4965872 (1990-10-01), Vasudev
patent: 5448104 (1995-09-01), Yallup
patent: 5627401 (1997-05-01), Yallup
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6448586 (2002-09-01), Nemati et al.
patent: 6462359 (2002-10-01), Nemati et al.
patent: 6492662 (2002-12-01), Hsu et al.
patent: 6512274 (2003-01-01), King et al.
patent: 6528356 (2003-03-01), Nemati et al.
patent: 6545297 (2003-04-01), Noble, Jr. et al.
patent: 6552398 (2003-04-01), Hsu et al.
patent: 6583452 (2003-06-01), Cho et al.
patent: 6611452 (2003-08-01), Han
patent: 6627924 (2003-09-01), Hsu et al.
patent: 6888176 (2005-05-01), Horch et al.
patent: 6913955 (2005-07-01), Horch et al.
Farid Nemati et al., U.S. Appl. No. 10/706,162, filed Nov. 12, 2003,Thyristor Circuit and Approach for TemperatureStability, assigned to the assignee of the present application, C-028.
F.Nemati and J.D. Plummer,A Novel High Density, Low Voltage SRAM Cell with a Vertical NDR Device, VLSI Technology Technical Digest, 1998.
F. Nemati and J.D. Plummer,A Novel Thyristor-based SRAM Cell (T-RAM) for High-Speed, Low-Voltage, Giga-Scale Memories, International Electron Device Meeting Technical Digest 1999.
National Scientific Corp.,TMOS Memory Cell, Breakthrough Technology in SRAM, at http://www.nsclocators.com/images/pdf/IP—tmos-2003.PDF, 2003.
R. Colin Johnson,Hybrid Tunnel Diodes Could Leapfrog Moore's Law, EE Times, Oct. 29, 2003, also at www.eetimes.com/at
ews/OEG20031029S0015.
Nemati Farid
Yang Kevin J.
Dang Phuc T.
Fields IP, PS
T-Ram Semiconductor Inc.
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