Metal working – Method of mechanical manufacture – Electrical device making
Patent
1993-04-29
1995-10-03
Arbes, Carl J.
Metal working
Method of mechanical manufacture
Electrical device making
29829, 29840, 264 61, H01K 310
Patent
active
054541611
ABSTRACT:
A high density through-hole interconnect with high aspect ratio vias is formed by sequentially forming layers of dielectric material on a previous dielectric layer. After each layer is formed, a plurality of through holes are etched through each layer and filled or metalized with an electrically conductive material having a coefficient of thermal expansion matching that of the dielectric layers and the integrated circuit that it will connect with. Preferably, the process of forming dielectric layers, forming through holes, and metalizing the through holes is repeated until the metalized through holes have an aspect ratio in the range of from 6 to 10. A support structure is constructed to interconnect with and support the metalized vias while the dielectric material is removed. A second dielectric material having the desired mechanical and electrical properties is poured into the support structure to fill the space between the metalized vias and allowed to solidify. The support structure is removed and the through-hole interconnector, comprising the metalized vias and the second dielectric material, is lapped and polished to predetermined manufacturing dimensions and tolerances.
REFERENCES:
patent: 3352730 (1967-11-01), Murch, Jr.
patent: 3791858 (1974-02-01), McPherson et al.
patent: 4348253 (1982-09-01), Subbarao et al.
patent: 4417393 (1983-11-01), Becker
patent: 4528072 (1985-07-01), Kurosawa et al.
patent: 4799984 (1988-01-01), Rellick
patent: 4806188 (1989-02-01), Rellick
patent: 4808273 (1989-02-01), Hau et al.
patent: 4810332 (1989-03-01), Pan
patent: 4868068 (1989-09-01), Yamaguchi et al.
patent: 4875982 (1989-10-01), Velie
patent: 4880684 (1989-11-01), Boss et al.
patent: 4938996 (1990-07-01), Ziv et al.
patent: 5069749 (1991-12-01), Gutierrez
patent: 5100501 (1992-03-01), Blumenthal et al.
IBM Technical Disclosure Bulletin vol. 21 No. 6 Nov. 1978 pp. 2270-2271 by J. M. Kolly et al.
Beilin Solomon I.
Lee Michael G.
Peters Michael G.
Wang Wen-chou V.
Arbes Carl J.
Fujitsu Limited
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