Threshold voltage tolerant logic

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307450, 307571, H03K 19094, H03K 19003, H03K 1912, H03K 1920

Patent

active

044006365

ABSTRACT:
A logic gate is disclosed employing enhancement mode MESFET gallium arsenide devices which do not require the tight process control necessary in the prior art because two such devices are employed in the gate circuit to mutually compensate for the effects of their equal deviation from nominal threshold voltages.

REFERENCES:
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patent: 3806742 (1974-04-01), Powell
patent: 3969632 (1976-07-01), Bobenrieth
patent: 3970875 (1976-07-01), Leehan
patent: 3975649 (1976-08-01), Kawagoe et al.
patent: 4016434 (1977-04-01), DeFilippi
patent: 4049980 (1977-09-01), Maitland
patent: 4112314 (1978-09-01), Gani et al.
patent: 4142114 (1979-02-01), Green
patent: 4208595 (1980-06-01), Gladstein et al.
patent: 4300064 (1981-11-01), Eden
Suzuki et al., "Logic Circuits with 2 .mu.m Gate Schottky Barrier FETs", Proc. of 6th Conf. on Solid State Devices, Tokyo, Jap.; 1974, pp. 219-224.
Nuzillat et al., "A Subnanosecond Integrated Switching Circuit with MESFET's for LSI"; IEEE JSSC, vol. SC-11, No. 3, pp. 385-394; 6/1976.
Richard C. Eden, et al., "The Prospects for Ultrahigh-Speed VLSI GaAs Digital Logic," IEEE Journal of Solid-State Circuits, vol. SC-14, No. 2, Apr. 1979, pp. 221-239.

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