Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Accelerating switching
Reexamination Certificate
2000-07-20
2003-09-23
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Accelerating switching
C327S377000, C327S427000, C327S580000, C327S581000
Reexamination Certificate
active
06624683
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention refers to a circuit design of a transistor connected as a diode, in particular to a design able to reduce the threshold voltage of the transistor.
Moreover, the present invention refers to a method for reducing the threshold voltage of the transistor connected as a diode.
2. Discussion of the Related Art
The trend in transistor design is toward devices that work with lower and lower supply voltages.
One of the significant design limitations is that related to the threshold voltage of the MOS transistors. The threshold voltage of a transistor depends on the minimum voltage achieved with the kind of process used.
In particular, the threshold voltage of the transistors connected as a diode, used widely in integrated circuits, represent a significant limit for the circuits such as current mirrors, sense amplifiers, and charge pumps.
At the decreasing of the supply voltage a lot of the classic structures of such kind, that use transistors connected as a diode, cannot work in a proper way any more.
SUMMARY OF THE INVENTION
The aim of the present invention is to reduce the threshold voltage of transistors connected as a diode.
The basic idea to reach such aim is to reduce the threshold voltage of a transistor applying a voltage generator in series to the control terminal of said transistor in a way that the difference of the transistor threshold voltage and of the voltage generator is smaller than the threshold voltage of the transistor.
From a general point of view this invention refers to a nMOS or pMOS transistor whose gate voltage is increased (for the nMOS transistors) or decreased (for the pMOS transistors) by using a circuit in series with the gate that provides an opportune delta of voltage.
According to a first aspect, the present invention is directed to a circuit design comprising a transistor having a control terminal, a first terminal connected to a first potential, a second terminal connected to a second potential, a voltage generator able to provide a prefixed value of voltage having a third terminal and a fourth terminal, said third terminal is connected to said control terminal and said fourth terminal is connected to said first terminal.
According to a second aspect, the present invention is directed to a method for reducing the threshold voltage of a transistor connected as a diode having a gate terminal to which it is associated a threshold voltage that provides the application of a voltage in series to the gate terminal of said transistor.
Achieving a circuit design able to reduce, to a predetermined value, the threshold voltage of the equivalent transistor connected as a diode, and in an embodiment of the present invention equal to the difference of the threshold voltage of the transistors used in the circuit design, has great advantage in all circuits in which a lower voltage threshold with respect to the one offered by conventional building processes.
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Bartoli Simone
Bedarida Lorenzo
Dima Vincenzo
Disegni Fabio
Cunningham Terry D.
Nguyen Long
STMicroelctronics S.r.l.
Wolf Greenfield & Sacks P.C.
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