Threshold voltage level generator for time division duplex commu

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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327 80, 327 50, 327552, 327 94, 375317, 348465, H03K 500, H03K 2506, H04L 2506

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active

059007494

ABSTRACT:
A circuit for generating a threshold voltage level from a time division duplex analog data signal. The circuit comprises a sample/hold circuit and an amplifier. The sample/hold circuit is arranged to sample the threshold voltage level during a reception interval and hold the threshold voltage level during a transmission interval. The amplifier includes an operational amplifier coupled to the sample/hold circuit for amplifying the analog data signal during a reception interval and amplifying the threshold voltage level during a transmission interval. A transconductance device is coupled to the operational amplifier, and a plurality of load legs are respectively coupled to a plurality of bias legs. A first selected pair of the respectively coupled load legs and bias legs is coupled to the transconductance device, and a second selected pair of the respectively coupled load legs and bias legs coupled to the output of the amplifier to provide the threshold voltage level.

REFERENCES:
patent: 5404172 (1995-04-01), Berman et al.
patent: 5412692 (1995-05-01), Uchida
OTA Linearization Via Electronically-Programmable Current Mirrors, William J. Adams and Jaime Ramirex-Angulo; pp. 2553-2556.
Regular Brief Papers; A CMOS OTA for HF Filters with Programmable Transfer Function; Eric J. van der Zwan et al.; IEEE Journal of Solids State Circuits, vol. 26, No. 11, Nov. 1991; pp. 1720-1723.
VLSI for Analog/Digital Communications; Miles A. Copeland; May 1991 IEEE Communications Magazine; pp. 25-30.

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