Threshold invariant voltage detecting device

Details Threshold invariant voltage detecting device Threshold invariant voltage detecting device

2000-03-16

2002-06-11

Le, N. (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S763010, C324S1540PB, C327S537000, C327S427000

Reexamination Certificate

active

06404221

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to voltage detecting circuits, and more particularly to a voltage detecting circuit which detects the voltage of a substrate of a semiconductor integrated circuit device.
2. Description of the Related Art
A voltage detecting circuit of a semiconductor integrated circuit device detects a negative substrate voltage VBB thereof, and generates a signal vbelz for adjusting a substrate voltage generating circuit on the basis of the substrate voltage VBB detected. The substrate voltage generating circuit generates the substrate voltage VBB based on the signal vbelz.
FIG. 1
is a circuit diagram of a voltage detecting circuit.
FIG. 2
shows an example of the operation of the voltage detecting circuit.
FIG. 3
is a timing chart of an example of the operation of the voltage detecting circuit. A voltage detecting circuit
100
shown in
FIG. 1
includes a load part
110
, a detection part
120
, and NOT circuits
130
-
1
and
130
-
2
.
When the voltage detecting circuit
100
is supplied with a power source voltage VDD generated outside of the semiconductor integrated circuit device or a power source voltage Vii generated inside the semiconductor integrated circuit device at time t
100
shown in part (A) of
FIG. 3
, a PMOS (P-channel Metal Oxide Semiconductor) transistor
111
of the load part
110
is turned ON, as shown in part (B) thereof. An NMOS (N-channel MOS) transistor
121
of the detection part
120
is turned OFF, as shown in part (C) of FIG.
3
. Thus, the potential of a node N
1
rises and reaches a high level.
When the potential of the node N
1
reaches the high level, the gate of a PMOS transistor
131
of the NOT circuit
130
-
1
and the gate of an NMOS transistor
132
thereof are set to the high level. As shown in parts (E) and (F) of
FIG. 3
, the PMOS transistor
131
is turned OFF, and the NMOS transistor
132
is turned ON. Thus, as shown in part (G) of
FIG. 3
, the potential of a node N
3
reaches a low level.
The NOT circuit
130
-
2
is supplied with the low level from the NOT circuit
130
-
1
, and inverts the low level thus supplied, so that the high level is output from the NOT circuit
130
-
2
. The signal output from the NOT circuit
130
-
2
shown in part (H) of
FIG. 3
is used as the signal vbelz for adjusting the substrate voltage generating circuit (not shown). At time t
110
, the substrate voltage generating circuit starts to generate the substrate voltage VBB from the signal vbelz.
The substrate voltage generating circuit generates the negative substrate voltage VBB in response to the signal vbelz which is at the high level. Then, as shown in part (I) of
FIG. 3
, the substrate voltage VBB gradually decreases, and reaches, at time t
120
, a value defined by equation (1) shown below:
VBB=V
GND
−Vth
  (1)
where V
GND
is the ground potential, and Vth is the threshold voltage of the NMOS transistor
121
.
When equation (1) stands (is in effect), the NMOS transistor
121
is turned ON, as shown in part (c) of FIG.
3
. Thus, as shown in part (D) of
FIG. 3
, the node N
1
switches to the low level. Then, the gate potentials of the PMOS transistor
131
and the NMOS transistor
132
of the NOT circuit
130
-
1
change to the low level. Thus, as shown in parts (E) and (F), the PMOS transistor
131
is turned ON, and the NMOS transistor
132
is turned OFF. Then, as shown in part (G) of
FIG. 3
, the potential of the node N
3
changes to the high level.
The NOT circuit
130
-
2
inverts the high level supplied from the NOT circuit
130
-
1
, and outputs the signal vbelz which is at the low level, as shown in part (H) of FIG.
3
. In response to the low-level signal Vbelz, the substrate voltage generating circuit stops generating the negative substrate voltage VBB. Thus, as shown in part (I) of
FIG. 3
, the substrate voltage VBB is adjusted so that equation (1) stands.
As described above, the substrate voltage VBB is adjusted based on the potential of the node N
1
.
FIG. 2
shows states of the transistors with respect to the substrate voltage VBB. In
FIG. 2
, “deeply biased” denotes that the substrate voltage VBB is greater in the negative-side direction than that defined by equation (1), and “lightly biased” denotes that VBB is greater in the positive-side direction than that defined by equation (1).
However, there is a possibility that the threshold voltages Vth of the transistors of the voltage detecting circuit shown in
FIG. 1
deviate from the target value due to variations in factors involved in the process of fabricating the semiconductor integrated circuit devices. For example, in case where the threshold voltage Vth of the PMOS transistor
111
has a variation different from that of the threshold voltage Vth of the NMOS transistor
121
, the variations cannot be mutually canceling at the node N
1
.
Thus, the operation of detecting the substrate voltage VBB is affected by variation in the threshold voltage Vth of the PMOS transistor
111
, so that the substrate voltage VBB cannot be adjusted accurately. Further, the NOT circuit
130
-
1
is set at an intermediate level when a level transition occurs at the node N
1
. At this time, the PMOS transistor
131
and the NMOS transistor
132
are both ON. Thus, a pass-through current flows through the NOT circuit
130
-
1
, and power is wastefully consumed.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide a voltage detecting circuit in which the above drawbacks are eliminated.
A more specific object of the present invention is to provide a voltage detecting circuit capable of accurately detecting the substrate voltage by reducing variations in the threshold voltages of transistors.
Another object of the present invention is to provide a voltage detecting circuit consuming a reduced amount of power.
The above objects of the present invention are achieved by a voltage detecting circuit including a constant-voltage source, a load part including a first transistor coupled to the constant-voltage source, and a detecting part which is connected to the load part and includes a second transistor of the same type as that of the first transistor. The detecting part detects a given voltage applied thereto.


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patent: B14585955 (2000-11-01), Uchida
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patent: 0-513928 (1992-05-01), None
patent: 2677301 (1997-07-01), None

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