Three-to-two carry save adder cell

Details Three-to-two carry save adder cell Three-to-two carry save adder cell

1992-08-25

1994-08-30

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

053434188

ABSTRACT:
A three-to-two adder which takes advantage of the fact that one of the inputs lags behind the other two inputs. A gate delay is eliminated in the currently preferred embodiment, an output is provided within two gate delays from the time that the last to arrive signal is valid. The adder is implemented using fewer gates than prior art adders.

REFERENCES:
patent: 4621338 (1986-11-01), Uhlenhoff
patent: 4897808 (1990-01-01), Nakagawa et al.
patent: 5151875 (1992-09-01), Sato

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