Three-terminal MOS integrated circuit switch

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

357 2312, 357 2314, 307571, 307304, H01L 2702

Patent

active

048579840

ABSTRACT:
The MOS switch described herein includes first and second MOS devices serially connected in a common substrate. Each device includes source, drain and channel regions which are biased to conduction in series between input and output terminals of the switch in its "on" or conductive state. The novel device connection prevents any pn junction in either MOS device from becoming forward biased. This action, in turn, prevents any parasitic bipolar transistor action in either device after the MOS switch turns off. This latter operational feature eliminates the need for a fourth terminal through which a DC bias potential is applied to either MOS device, and thus undesirable shifts in threshold voltage produced by such DC bias are eliminated.

REFERENCES:
patent: 3916430 (1975-10-01), Heuner et al.
patent: 4152716 (1979-05-01), Torii
patent: 4209713 (1980-06-01), Satou et al.
patent: 4477742 (1984-10-01), Janutka
patent: 4509070 (1985-04-01), Furumura

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