Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Light responsive structure
Reexamination Certificate
2001-07-17
2003-09-23
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Light responsive structure
C257S185000, C257S462000
Reexamination Certificate
active
06624449
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to phototransistors.
More particularly, the present invention relates to three terminal edge illuminated heterojunction bipolar phototransistors (HBPTs).
BACKGROUND OF THE INVENTION
As the bit rates of telecommunication and data communication systems increase, the demands on the performance requirements of photoreceivers increases. As bit rates extend beyond 40 Gbit/s, the sensitivity of optical receivers tends to decrease causing degradation in the overall performance of the optical communications link. Receiver sensitivity has been improved in prior art by implementing avalanche photodetectors (APDs) as the optical detection element. This improvement in receiver sensitivity has been due to the fact that APDs can provide internal optical to electrical gain through the avalanche multiplication process. Some of the problems associated with implementing APDs in the receiver circuits are that the avalanche multiplication process is an inherently noisy process and requires excessively high bias voltages on the order of 40 volts to achieve the desired gain. The high electric fields that result from these excessively high bias voltages lead to reliability problems that cause premature failure. Many engineering solutions need to be implemented to circumvent these issues. As such, the fabrication and device layer profile are highly specialized for the APD, which prevents the monolithic integration of the APD with the transimpedance amplifier (TIA) circuit. The resulting consequence of this specialization is that it is unlikely that front-end optical receivers that are based on APDs will be able to operate at 40 Gbps bit rates or beyond due to the excessive parasitic losses that come from the hybrid integration of the APD with the rest of the circuit.
What is desired at these high bit rates is a solution that can improve the sensitivity of the receiver by providing internal optical to electrical gain without the excessive noise characteristics of the APD and without the excessive bias voltages. In addition, a detector that can be easily monolithically integrated with the rest of the receiver electronics would greatly reduce the parasitic losses associated with a hybrid interconnection and further increase the performance of the receiver.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide a new and improved three terminal edge illuminated heterojunction bipolar phototransistor.
It is an object of the present invention to provide a new and improved three terminal edge illuminated heterojunction bipolar phototransistor which decreases the excessive parasitic losses.
It is another object of the present invention to provide a new and improved three terminal edge illuminated heterojunction bipolar phototransistor which allows it to be monolithically integrated with the receiver circuitry.
It is another object of the present invention to provide a new and improved three terminal edge illuminated heterojunction bipolar phototransistor which has a short carrier transit-time.
And another object of the invention is to provide a new and improved three terminal edge illuminated heterojunction bipolar phototransistor which has a high internal quantum efficiency.
Still another object of the present invention is to provide a new and improved three terminal edge illuminated heterojunction bipolar phototransistor which has a high external coupling efficiency.
A further object of the invention is to provide a new and improved three terminal edge illuminated heterojunction bipolar phototransistor which has the ability to perform at bit rates greater than 40 Gbits/second.
SUMMARY OF THE INVENTION
To achieve the objects and advantages specified above and others, an edge illuminated epilayer waveguide phototransistor (hereinafter referred to as “WPT”) is disclosed which includes a subcollector layer formed from an epitaxially grown quaternary semiconductor material that is grown on a semiconductor substrate. The epitaxially grown quaternary semiconductor material improves the optical waveguide mode properties. A collector region is epitaxially grown on the subcollector layer. A base region is epitaxially grown on the collector layer. A very thin spacer layer is grown between the base and emitter layers. An emitter region is then epitaxially grown on the spacer layer. The various layers and regions are formed so as to define an edge-illuminated facet for receiving incident light. Further, ohmic contacts are formed to the subcollector, base, and emitter regions to allow electrical signals to be extracted from the phototransistor. In a preferred embodiment, the subcollector region consists of an InGaAsP quaternary semiconductor with a composition that corresponds to a bandgap wavelength of 1.15 &mgr;m. The InGaAsP subcollector is a unique advantage that allows the optimization of the input optical coupling efficiency without sacrificing the phototransistor'electrical performance. The InGaAsP subcollector expands the optical mode in the vertical direction, which increases the input mode coupling efficiency to commercially available lensed optical fibers without degrading the electrical properties of the device. The heavily doped InGaAsP subcollector also maintains the necessary electrical characteristics needed for high performance device operation.
The WPT discussed here will eliminate all of the previously mentioned issues associated with the APD due to superior noise performance and reduced bias voltage requirement (2 volts). In addition, by optimizing the layer structure of the WPT, the device can be monolithically integrated with receiver circuits consisting of InP-based HBTs resulting in a low-cost, high performance receiver. This is due to the fact that the epilayer profile can be defined to simultaneously optimize the performance of the WPT and the HBT on the same wafer. Also, the WPT uses a subcollector region that expands the optical mode size vertically without degrading the electrical properties of the device. Expanding the optical mode size in this manner increases the input optical coupling efficiency.
The WPT geometry has inherent advantages over top-illuminated phototransistors that have been demonstrated in the prior art. Some problems associated with the top-illuminated approach include the fact that the thickness of the absorbing layers must be increased to above 1 &mgr;m in order to absorb greater than 90% of the incident light. This leads to poor frequency response of the top-illuminated phototransistor due to the excessive base and collector carrier transit-times. The waveguide phototransistor geometry solves this problem because the light propagates and gets absorbed down the length of the device in a direction that is orthogonal to the flow of electrical carriers. As such, the thickness of the absorbing layers can be kept small such that the base and collector transit-times are short which allows for high-speed operation.
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Kalluri Srinath
Scott David C.
Vang Timothy A.
Coltry Michael W.
Parsons Robert A.
Parsons & Goltry
Rose Kiesha
Zarabian Amir
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