Three-state output buffer with anti-saturation control

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307456, 307473, 307475, 307300, 3072992, H03K 19013, H03K 19088

Patent

active

047091673

ABSTRACT:
A three-state output buffer delivering digital signals to a multi-line bus when in the data state, and presenting a high-impedance to the bus in the third state. The buffer output includes a two-transistor totem pole. Individual control transistor drivers are provided to switch the output transistors off when switching to the third state. The control transistors are actively driven both on and off. One of the output transistors includes an inverted-mode auxiliary collector which reduces base drive and saturation in that transistor, and which serves to hold off the other output transistor. Common control circuitry for all the buffer stages includes special means for reducing saturation effects to speed up control signals.

REFERENCES:
patent: 3751680 (1973-08-01), Hodges
patent: 4049975 (1977-09-01), Colaco
patent: 4081695 (1978-03-01), Allen et al.
patent: 4322640 (1982-03-01), Fukushima et al.
patent: 4339675 (1982-07-01), Ramsey
patent: 4376900 (1983-03-01), Metzger

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