Three-state complementary MOS integrated circuit

Details Three-state complementary MOS integrated circuit Three-state complementary MOS integrated circuit

1987-11-10

1989-02-14

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307290, 307279, 307452, 307585, 365168, H03K 3295, H03K 3354, H03K 448, H03K 1716

Patent

active

048048674

ABSTRACT:
In a three-state complementary MOS integrated circuit having an output circuit comprising a P-channel MOS transistor and an N-channel MOS transistor, part of a pre-output stage circuit between the gate inputs of the P-channel MOS transistor and the N-channel MOS transistor of the output circuit comprises a parallel circuit of a first series circuit and a second series circuit, each of the first series circuits comprising a P-channel MOS transistor to which the control signal is applied and an N-channel MOS transistor to which the in inverted control signal is applied. When the control signal and the inverted control signal are at the same potential, either the P-channel MOS transistors or the N-channel MOS transistors of the parallel circuit are off. Accordingly totempole current through the pre-output stage circuit is avoided.

REFERENCES:
patent: 4295062 (1981-10-01), Mihalich et al.
patent: 4507649 (1985-03-01), Dingwall et al.
patent: 4563594 (1986-01-01), Koyama
patent: 4733105 (1988-03-01), Shin et al.

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