Three-phase current sensor and estimator

Electric power conversion systems – Current conversion – With condition responsive means to control the output...

Reexamination Certificate

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C363S132000, C318S801000

Reexamination Certificate

active

06301137

ABSTRACT:

This application relates to current sensors and estimators for use with inverters such as pulse-width modulated field-effect transistors for driving a three-phase load, and in particular to an estimator for estimating the current flowing in each of the three legs of a three-phase load.
BACKGROUND OF THE INVENTION
It is conventional to use Hall-effect devices to measure the current in each of the legs of a three-phase load supplied by a pulse-width modulated inverter. Such inverters typically use three pairs of field-effect transistors (FETs) or equivalent to supply the three-phase load (which may be, for example, a three-phase AC motor). Hall-effect devices are large and expensive. It is an object of this invention to replace such devices with a small and economical solid-state circuit that makes use of sensing resistors in the return legs of the inverter circuit in combination with an estimator for receiving certain signals representing selected parameters and computing an estimated current value for each leg.
It is known to introduce a resistor into one or more of the return legs of the FETs of an inverter. See, for example, U.S. Pat. No. 5,825,641 issued to Mangtani on Oct. 20, 1998. However, Mangtani does not provide any provision to utilize the voltages developed across the sensing resistors to generate an estimate of the respective currents flowing in the legs of the load.
Voltages across sensing resistors have also been used to control brushless motors; see for example U.S. Pat. No. 5,469,033 issued to Huang on Nov. 21, 1995. However, Huang makes no provision for producing a signal representative of the current flowing in each leg of the load.
SUMMARY OF THE INVENTION
For measuring leg current in each leg of a three-phase load powered by an inverter including an FET arrangement of the type described above, or equivalent, the present invention replaces the conventional Hall-effect device with simple sensing resistors, one in each return leg A, B, and C of each field-effect transistor (FET) pair of the inverter. By comparing and processing the voltages produced across the sensing resistors, estimated values of the current in each leg of the load are obtained. The sensing resistors should be of low resistance so as not to generate unacceptable power losses.
If the voltages produced by these leg resistors in the three return legs of the FETs are expressed as V
a
, V
b
and V
c
respectively, and if the voltages V
a
and V
c
are applied to the input terminals of a first differential amplifier, and if the voltages V
b
and V
c
are applied to the input terminals of a second differential amplifier, the output voltages of these differential amplifiers will be respectively of the form
D
vac
=K(V
a
−V
c
)/(TS+1)
and
D
vbc
=K(V
b
−V
c
)/(TS+1)
Where
D
vac
is the differential voltage output of the first differential amplifier, whose input terminals are connected across legs A and C of the circuit (in each case between the associated sensing resistor of the respective leg and the FET connected to the sensing resistor);
D
vbc
is the differential voltage output of the second differential amplifier, whose input terminals are connected across legs B and C of the circuit (in each case between the associated sensing resistor of the respective leg and the FET connected to the sensing resistor);
K is the gain of the differential amplifier; and
1/(TS+1) is a dimensionless value representing the filter bandwidth in the differential amplifier. The value T is an intrinsic value representing the resistance-capacitance time constant of the differential amplifier, and S is the Laplace operator.
The continuous output analog differential voltage signals produced by the two differential amplifiers may conveniently be converted to digital signals that are processed in a microprocessor to produce estimated values of the current in each leg of the load. These estimated current values may in turn be displayed for the benefit of the operator of the three-phase load being driven by the inverter, or may be used to drive a suitable feedback loop or circuit, or otherwise. The particular use to which the estimated load leg current values are put is not per se part of the present invention.
More specifically, the three-phase DC-to-AC inverter for which the present invention is suitable conventionally includes three pairs of FETs that are pulse-width modulated. Insulated gate bipolar transistors (IGBTs) may be substituted for the FETs; this specification should be read with this possibility in mind. Alternative equivalent inverter circuits may be devised. For the purpose of this specification, the AC power drivers such as FETs in such circuits are referred to as controlled power drivers, and in the case of FETs, the control is supplied by means of an individual pulse-width modulated gate control signal applied to each FET.
According to the invention, the current is estimated in each leg of the load by providing first, second and third resistors respectively in the return legs of associated pairs of FETs to derive a load current-sensitive voltage across each resistor. These voltages are applied as follows to a pair of differential amplifiers: The voltage appearing at the junction of the return leg A of the first pair of FETs and the associated first resistor is applied to a first input terminal of the first differential amplifier, and the voltage appearing at the junction of the return leg C of the third pair of FETs and the associated third resistor is applied to a second input terminal of the first differential amplifier. The voltage appearing at the junction of the return leg B of the second pair of FETs and the associated second resistor is applied to a first input terminal of the second differential amplifier, and the voltage appearing at the junction of the return leg C of the third pair of FETs and the associated third resistor is applied to a second input terminal of the second differential amplifier. (Note that in this specification, the designations “first”, “second”, “third”, and legs “A”, “B”, and “C”, and related identifying symbols, are arbitrary.) The two differential amplifiers receiving these input voltages generate the output differential voltages D
vac
and D
vbc
respectively.
A leg current estimator, preferably including a suitable signal processing circuit within a microcontroller, is provided to process the output signals D
vac
and D
vbc
obtained from the

I
aE

t
=
z

[
D
Vac
-
I
aE
M

(
M
-
α
)
+
I
cE
M

(
M
-
γ
)
]
;
differential amplifiers to solve the equations:

I
bE

t
=
z

[
D
Vbc
-
D
Vac
+
I
aE
M

(
M
-
α
)
-
I
bE
M

(
M
-
β
)
]
;
and

I
cE

t
=
z

[
-
D
Vbc
+
I
bE
M

(
M
-
β
)
-
I
cE
M

(
M
-
γ
)
]
;
where
I
aE
is the estimated current in leg A;
I
bE
is the estimated current in leg B;
I
cE
is the estimated current in leg C;
t is time;
z is the dimensionless bandwidth of the processing circuitry (which may be set by the operator and may arbitrarily take the value of 10,000 in the absence of any good reason for choosing a different value; normally the value of z is selected to ensure that analysis occurs within the range of linear performance of the load; for higher load frequencies, the value of z should be higher, for lower load frequencies, the value of z may be lower); M is the half-period of the pulse width modulating signal (i.e., M may be expressed as ½f, where f is the pulse-width modulating signal carrier frequency); and the values &agr;, &bgr; and &ggr; are derived as follows:
&agr;=V
L
sin(&ohgr;t−&phgr;)
 &bgr;=V
L
sin(&ohgr;t−&phgr;−2&pgr;/3)
&ggr;=V
L
sin(&ohgr;t−&phgr;−4&pgr;/3)
where V
L
is the amplitude, &ohgr;is the load voltage frequency, and &phgr;is the phase angle of the load voltage. These three values &agr;, &bgr; and &ggr; are set by the operator in the microcontroller depending upon the three-phase power application required. Note that the values &

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