Electric power conversion systems – Current conversion – With means to introduce or eliminate frequency components
Reexamination Certificate
2003-06-06
2004-09-21
Berhane, Adolf (Department: 2838)
Electric power conversion systems
Current conversion
With means to introduce or eliminate frequency components
C363S056020, C363S132000
Reexamination Certificate
active
06795323
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a three-level neutral-point-clamped PWM inverter apparatus which is one of a power converter such as an inverter or a servo drive that speed-variably drives a motor, and a power converter that interconnects systems, and also to a neutral voltage controller which is used in such a three-level neutral-point-clamped PWM inverter to control a neutral voltage that is a voltage between a neutral point of two capacitors connected in series between positive and negative busses of the apparatus, and the negative bus.
BACKGROUND ART
FIG. 1
is a circuit diagram showing the main circuit configuration of a three-level neutral-point-clamped PWM inverter apparatus. As shown in
FIG. 1
, the three-level neutral-point-clamped PWM inverter apparatus is configured by two capacitors
7
, three-phase output terminals, twelve switching elements
8
, and eighteen diodes
9
.
In the thus configured three-level neutral-point-clamped PWM inverter apparatus, when switching elements
8
1
,
8
2
are turned on, the output terminals of the phases are connected to a positive bus which is connected to a point P, and output phase voltages of the phases are at a high level. When switching elements
8
2
,
8
3
are turned on, the output terminals of the phases are connected to a point C which is the neutral point, and the output phase voltages of the phases are at an intermediate level (neutral voltage) which is between the high level and a low level. When switching elements
8
3
,
8
4
are turned on, the output terminals of the phases are connected to a negative bus which is connected to a point N, and the output phase voltages of the phases are at the low level. In the three-level neutral-point-clamped PWM inverter apparatus, usually, the switching elements
8
are switched on the basis of the above-mentioned three patterns to drive a three-phase load.
In such a three-level neutral-point-clamped PWM inverter apparatus, the neutral voltage is obtained by voltage division of the capacitors
7
. The neutral voltage is varied in accordance with a current supplied to the load. When the neutral voltage is varied, an excess voltage is applied to the capacitors
7
, thereby causing the possibility that the capacitors
7
are shortened in life or broken. In a three-level neutral-point-clamped PWM inverter apparatus, therefore, a neutral voltage control is performed in order to suppress or control variation of the neutral voltage.
In a neutral voltage control of the thus configured neutral-point-clamped PWM inverter, conventionally, the current flowing through the neutral line is controlled by using dipolar modulation or unipolar modulation as a method of generating PWM pulses, and increasing and decreasing the zero-sequence voltage of a voltage command.
On the other hand, as disclosed in JP-A-5-292754, when the concept of a voltage vector is introduced and a PWM control is performed, a method is usually employed in which a neutral voltage control is performed while the increasing or decreasing direction of an intermediate voltage vector is determined from the sign of a load power. As proposed in JP-A-2001-57784, such a method includes that in which a generation time ratio of a correction vector is finely adjusted in accordance with the direction of a current flowing through a neutral line.
In these methods, variation of the neutral voltage is suppressed by, among twelve sets of switch states such as shown in
FIG. 2
, adjusting the ratio of paired switch states in which the output voltages are equal to each other but the current directions of the neutral line are opposite to each other.
As proposed in JP-A-2001-61283, there is also a method such as shown in
FIG. 3
in which a switch state disturbing the neutral voltage is suppressed. When switch states which can be attained by a neutral-point-clamped PWM inverter are indicated in the form of output voltage vectors, they can be expressed as shown in FIG.
4
.
FIG. 5
shows an example of an apparatus which calculates a PWM pulse of a neutral-point-clamped PWM inverter with using the concept of a space voltage vector. The apparatus comprises a vector time calculator
102
, a vector time register
103
, a PWM pulse pattern setting device
104
, and a parameter setting device
105
.
In the apparatus, it is assumed that an output voltage output from the inverter is a space vector quantity such as shown in FIG.
4
. When the modulation rate (k) and phase (&thgr;) of an output voltage V are given, the vector time calculator
102
outputs the region of the output voltage vector V to the PWM pulse pattern setting device
104
, selects the 27 kinds of vectors shown in
FIG. 4
, and calculates vector sequences which are sequentially output and vector output times (T0-T5) as PWM pulses in which an average of PWM periods is equal to the output voltage vector V. The vector sequences and the vector output times (T0-T5) are stored in the vector time register
103
. The vector sequences and vector output times which are stored are converted by the PWM pulse pattern setting device
104
to a pulse sequence of U1, U2, V1, V2, W1, and W2 which drive switch elements of an inverter main circuit. The switch elements of the inverter main circuit are turned on/off by the pulse sequence, and a desired voltage is output. In this apparatus, on the basis of the neutral voltage from the parameter setting device
105
and a signal from a detector for a load power factor, the PWM pulse pattern setting device
104
adjusts the generation time of the correction vector in a direction along which the variation of the neutral voltage is reduced.
JP-A-9-37592 discloses a method of PWM controlling a three-level inverter in which a region between one long vector of output space vectors of a three-level inverter, and a vector that is adjacent to the long vector, and that has an intermediate length is set as one space. The whole space of 360° which is formed by these vectors is divided into twelve regions. The region number of a command vector in the twelve regions is judged depending on the rotation angle of the command vector. The modulation rate is calculated in accordance with the degree of the command vector. The transmission system and the transmission sequence for suppressing variation of the neutral voltage of voltage dividing capacitors of the three-level inverter are determined in accordance with the modulation rate and the current ratio. Specific output times of the vectors in the transmission system and the transmission sequence are calculated to PWM control the three-level inverter.
As described above, in a three-phase neutral-point-clamped PWM inverter, usually, an even number of capacitors are directly connected between positive and negative busses of a main circuit in order to obtain the neutral voltage, and a neutral line is used while being taken out from a capacitor terminal which has a voltage that is exactly the middle voltage between the positive and negative busses. The neutral line is connected as shown in
FIGS. 2 and 3
depending on the output load of the PWM inverter and the switch states of the PWM inverter. The voltage of the neutral line (the neutral voltage) is varied in accordance with the current which charges the capacitors through the positive and negative busses, and that which is supplied from the connected load.
As shown in the conventional art examples, in the switch states shown in
FIG. 3
(in the description, the vector is referred to as a correction vector), a set of switch states in which the line voltage to be output to the load is the same but the phase of the load connected to the neutral line is different (adjacent switch states in
FIG. 2
are bundled into one set) is used, and the time ratio in which the switch states of the set are generated is adjusted, whereby the neutral potential can be finely controlled.
In the switch states shown in
FIG. 2
(in the description, the vector is referred to as an intermediate vector), however, the neutral voltage is varied by the phase currents of the load connected to th
Tanaka Yoshiyuki
Watanabe Eiji
Yamanaka Katsutoshi
Berhane Adolf
Kabushiki Kaisha Yaskawa Denki
Sughrue & Mion, PLLC
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