Three-dimensional stacked semiconductor package with chips...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257SE23052, C257SE23039, C257SE23069, C257SE23068, C257SE23174, C257SE23178, C257S777000, C257S723000, C257S725000, C257S728000, C257S696000, C257S698000, C257S691000, C257S684000, C257S796000, C257S676000, C257S666000, C257S784000, C257S786000, C257S787000

Reexamination Certificate

active

11021313

ABSTRACT:
A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of the lead.

REFERENCES:
patent: 4706166 (1987-11-01), Go
patent: 4807021 (1989-02-01), Okumura
patent: 4897708 (1990-01-01), Clements
patent: 4954875 (1990-09-01), Clements
patent: 4984358 (1991-01-01), Nelson
patent: 4996583 (1991-02-01), Hatada
patent: 5049979 (1991-09-01), Hashemi et al.
patent: 5104820 (1992-04-01), Go et al.
patent: 5138438 (1992-08-01), Masayuki et al.
patent: 5299092 (1994-03-01), Yaguchi et al.
patent: 5332922 (1994-07-01), Oguchi et al.
patent: 5394303 (1995-02-01), Yamaji
patent: 5484959 (1996-01-01), Burns
patent: 5514907 (1996-05-01), Moshayedi
patent: 5594275 (1997-01-01), Kwon et al.
patent: 5625221 (1997-04-01), Kim et al.
patent: 5656856 (1997-08-01), Kweon
patent: 5689135 (1997-11-01), Ball
patent: 5744827 (1998-04-01), Jeong et al.
patent: 5804874 (1998-09-01), An et al.
patent: 5854507 (1998-12-01), Miremadi et al.
patent: 5910685 (1999-06-01), Watanabe et al.
patent: 5973393 (1999-10-01), Chia et al.
patent: 6002167 (1999-12-01), Hatano et al.
patent: 6072233 (2000-06-01), Corisis et al.
patent: 6084309 (2000-07-01), Kawashima et al.
patent: 6087222 (2000-07-01), Jung Lin et al.
patent: 6087718 (2000-07-01), Cho
patent: 6124633 (2000-09-01), Vindasius et al.
patent: 6137163 (2000-10-01), Kim et al.
patent: 6165819 (2000-12-01), Seki et al.
patent: 6175149 (2001-01-01), Akram
patent: 6180881 (2001-01-01), Isaak
patent: 6188127 (2001-02-01), Senba et al.
patent: 6190944 (2001-02-01), Choi
patent: 6232213 (2001-05-01), King et al.
patent: 6235554 (2001-05-01), Akram et al.
patent: 6303997 (2001-10-01), Lee
patent: 6335565 (2002-01-01), Miyamoto et al.
patent: 6479321 (2002-11-01), Wang et al.
patent: 6483181 (2002-11-01), Chang et al.
patent: 6483718 (2002-11-01), Hashimoto
patent: 6492718 (2002-12-01), Ohmori
patent: 6501165 (2002-12-01), Farnworth et al.
patent: 6504241 (2003-01-01), Yanagida
patent: 6509639 (2003-01-01), Lin
patent: 6564454 (2003-05-01), Glenn et al.
patent: 6608371 (2003-08-01), Kurashima et al.
patent: 6744121 (2004-06-01), Chang et al.
patent: 6794741 (2004-09-01), Lin et al.
patent: 2002/0153599 (2002-10-01), Chang et al.
patent: 2003/0011052 (2003-01-01), Kim

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