Three dimensional stacked nonvolatile semiconductor memory

Details Three dimensional stacked nonvolatile semiconductor memory Three dimensional stacked nonvolatile semiconductor memory

2009-03-19

2010-12-28

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185050, C365S185230

Reexamination Certificate

active

07859902

ABSTRACT:
A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks. The first block has a first cell unit which includes a memory cell to be programmed and a second cell unit which does not include a memory cell to be programmed, and programming is executed by applying a program potential or a transfer potential to word lines in the first block after the initial potential of channels of the memory cells in the first and second cell units is set to a plus potential. In the programming, the program potential and the transfer potential are not applied to word lines in the second block.

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H. Tanaka, et al., “Bit Cost Scalable Technology with Punch and Plug Process for Ultra High Density Flash Memory”, 2007 Symposium on VLSI Technology Digest of Technical Papers, pp. 14-15.

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