Three-dimensional stackable die configuration for an...

Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...

Reexamination Certificate

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C439S077000, C439S067000

Reexamination Certificate

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07438558

ABSTRACT:
A three-dimensional die configuration for mounting electronic components to a circuit board includes a circuit board having at least one circuit board die, a first electronic component mounted at the circuit board die and a first substrate member including a first surface electrically connected to the first chip. The three-dimensional die configuration further includes a double-sided land grid array having a first surface electrically connected to a second surface of the first substrate member. A second substrate member is electrically connected to a second surface of the double-sided land grid array. A second electronic component is electrically connected to a second surface of the second substrate member. A thermal interface member abuts the second chip and is covered by a cap member. The resulting three-dimensional die configuration establishes a multiple electronic component mounting arrangement having a footprint of a single electronic component.

REFERENCES:
patent: 5850693 (1998-12-01), Guran et al.
patent: 5935687 (1999-08-01), Davidson et al.
patent: 6036502 (2000-03-01), Neidich et al.
patent: 6354844 (2002-03-01), Coico et al.
patent: 6435883 (2002-08-01), Warren
patent: 6590159 (2003-07-01), Fan et al.
patent: 6903941 (2005-06-01), Paola
patent: 2003/0020151 (2003-01-01), Chen

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