Three-dimensional semiconductor device structure

Details Three-dimensional semiconductor device structure Three-dimensional semiconductor device structure

1992-04-03

1993-08-03

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

Mesa structure

257618, 257621, 257626, 257536, H01L 2972, H01L 2906

Patent

active

052332195

ABSTRACT:
A semiconductor device and a method of manufacture thereof by which circuit elements are readily formed as a three-dimensional structure without increasing the device size are provided. An N.sup.31 type epitaxially grown layer (4) is first formed on a P.sup.30 type silicon substrate (2), and then a P.sup.30 type diffusion layer (31), an emitter layer (32) (P.sup.30 type) and an N.sup.30 type diffusion layer (33) are formed in the N.sup.31 type epitaxially grown layer (4). Next, an underside of the substrate (2) is etched to form a bottom recessed part (6), from which a collector region (8) (P.sup.+ type) is formed in such a manner that it reaches the P.sup.+ type diffusion layer (31). Thus, a vertical PNP type transistor is obtained readily. In this method, the collector region (8) is formed at a latter step, so that redistribution of the collector region (8) due to epitaxial growth can be avoided.

REFERENCES:
patent: 4772929 (1988-09-01), Manchester

Affiliated with

Also associated with

Rating

Three-dimensional semiconductor device structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Three-dimensional semiconductor device structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Three-dimensional semiconductor device structure will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2273050