Three dimensional semiconductor circuit structure with optical i

Details Three dimensional semiconductor circuit structure with optical i Three dimensional semiconductor circuit structure with optical i

1995-06-07

1997-06-10

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

257 80, H01L 310203, H01L 2715, H01L 3112, H01L 3300

Patent

active

056379072

ABSTRACT:
General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor layer of the membrane. The semiconductor membrane layer is initially formed from a substrate of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as support and electrical interconnect for conventional integrated circuit die bonded thereto, with the interconnect formed in multiple layers in the membrane. Multiple die can be connected to one such membrane, which is then packaged as a multi-chip module. Other applications are based on (circuit) membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D IC fabrication.

REFERENCES:
patent: 4767973 (1988-08-01), Jacobsen et al.
patent: 4824073 (1989-04-01), Zdeblick
patent: 4996627 (1991-02-01), Zias et al.

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