Three-dimensional package

Details Three-dimensional package Three-dimensional package

2007-08-28

2007-08-28

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S666000, C257S685000, C257S777000

Reexamination Certificate

active

11082096

ABSTRACT:
An electronic device (60) including a first integrated circuit (IC) die (62) electrically connected to a first lead frame (64) and a second IC die (66) electrically connected to a second lead frame (68). The first lead frame (64) is electrically connected to the second lead frame (68) by at least one stud bump (72), which is selectively formed where an electrical connection between the first lead frame (64) and the second lead frame (68) is required. The first and second lead frames (64) and (68), the first and second IC dies (62) and (66), and the at least one stud bump (72) are encapsulated by a mold compound (74) to form a 3D package.

REFERENCES:
patent: 5608265 (1997-03-01), Kitano et al.
patent: 5744827 (1998-04-01), Jeong et al.
patent: 6294406 (2001-09-01), Bertin et al.
patent: 6320251 (2001-11-01), Glenn
patent: 6545345 (2003-04-01), Glenn et al.
patent: 6605866 (2003-08-01), Crowley et al.
patent: 6750545 (2004-06-01), Lee et al.
patent: 2003/0201520 (2003-10-01), Knapp et al.

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