Three-dimensional memory module architectures

Static information storage and retrieval – Interconnection arrangements – Optical

Reexamination Certificate

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C365S230030, C365S051000

Reexamination Certificate

active

08059443

ABSTRACT:
Various embodiments of the present invention are directed to stacked memory modules. In one embodiment of the present invention, a memory module comprises at least one memory-controller layer stacked with at least one memory layer. Fine pitched through vias (e.g., through silicon vias) extend approximately perpendicular to a surface of the at least one memory controller through the stack providing electronic communication between the at least one memory controller and the at least one memory layers. Additionally, the memory-controller layer includes at least one external interface configured to transmit data to and from the memory module. Furthermore, the memory module can include an optical layer. The optical layer can be included in the stack and has a bus waveguide to transmit data to and from the at least one memory controller. The external interface can be an optical external interface which interfaces with the optical layer.

REFERENCES:
patent: 5361233 (1994-11-01), Kotani
patent: 5481133 (1996-01-01), Hsu
patent: 5652811 (1997-07-01), Cook
patent: 5731945 (1998-03-01), Bertin et al.
patent: 6208545 (2001-03-01), Leedy
patent: 6462977 (2002-10-01), Butz
patent: 6477286 (2002-11-01), Ouchi
patent: 6480433 (2002-11-01), Huffman
patent: 6636668 (2003-10-01), Al-hemyari
patent: 6885099 (2005-04-01), Ogawa
patent: 6934450 (2005-08-01), Hiramatsu
patent: 6999370 (2006-02-01), Luk et al.
patent: 7123497 (2006-10-01), Matsui et al.
patent: 7138295 (2006-11-01), Leedy
patent: 7177171 (2007-02-01), Kasai
patent: 7327600 (2008-02-01), Norman
patent: 7532785 (2009-05-01), Beausoleil
patent: 2002/0039464 (2002-04-01), Yoshimura
patent: 2003/0155656 (2003-08-01), Chiu et al.
patent: 2004/0150081 (2004-08-01), Ogawa
patent: 2005/0023656 (2005-02-01), Leedy
patent: 2006/0164882 (2006-07-01), Norman
patent: 2007/0070669 (2007-03-01), Tsern
patent: 2007/0090507 (2007-04-01), Lin
patent: 2007/0147845 (2007-06-01), Epitaux
patent: 2008/0151950 (2008-06-01), Lin
patent: 2009/0103855 (2009-04-01), Binkert
patent: WO 2006046801 (2006-05-01), None
U.S. Appl. No. 11/977,350, Non-Final Rejection dated May 3, 2010, pp. 1-6 and attachments.
U.S. Appl. No. 11/975,974, Non-Final Rejection dated Sep. 15, 2008, pp. 1-10 and attachments.
U.S. Appl. No. 11/975,974, Notice of Allowance dated Mar. 31, 2009, pp. 1-5 and attachments.

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