Three-dimensional memory devices and methods of...

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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C365S063000

Reexamination Certificate

active

07554873

ABSTRACT:
A memory device includes a plurality of planes of memory arrays, each memory array including a plurality of memory cells. The memory device also includes a plurality of word lines and bit lines coupled to the memory cells in each plane, and at least one transistor to select at least one of the memory arrays.

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patent: 6034882 (2000-03-01), Johnson et al.
patent: 6504742 (2003-01-01), Tran et al.
patent: 6687147 (2004-02-01), Fricke et al.
patent: 6781858 (2004-08-01), Fricke et al.

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