Three-dimensional integrated heterogeneous semiconductor...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S068000, C257S069000, C257S070000

Reexamination Certificate

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07741645

ABSTRACT:
A first set of semiconductor devices is formed on a first semiconductor substrate comprising a first semiconductor material having a first melting point. A first via-level dielectric layer containing first contact vias is formed on the first semiconductor substrate. A second semiconductor substrate comprising a second semiconductor material having a second melting point lower than the first melting point is formed either by bonding or deposition. A second set of semiconductor devices is formed on the second semiconductor substrate. A second via-level dielectric layer, second contact vias contacting the second set of semiconductor devices, and inter-substrate vias electrically connecting the first contact vias are thereafter formed. A metal interconnect layer containing a metal interconnect structure is formed over the second via-level dielectric layer to electrically connect the first and second set of semiconductor devices through the second contact vias and the inter-substrate vias.

REFERENCES:
patent: 7214993 (2007-05-01), Yang
patent: 2005/0067620 (2005-03-01), Chan et al.
patent: 2006/0292880 (2006-12-01), Son et al.
patent: 2007/0145367 (2007-06-01), Chen et al.
patent: 2007/0181953 (2007-08-01), Lyu et al.

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