Three-dimensional integrated circuit

Details Three-dimensional integrated circuit Three-dimensional integrated circuit

1985-11-19

1988-12-27

Edlow, Martin H.

357 22, 357 12, 357 44, H01L 2702, H01L 2980, H01L 2988

Patent

active

047944420

ABSTRACT:
A single-crystal monolith containing a 3-D doping pattern forming varied devices and circuits that are junction-isolated. The semiconductor monolith includes interconnecting signal paths and power buses, also junction-isolated, usually with N+ regions within P matrix regions, and tunnel junctions, N+-P+ junctions, as ohmic contacts from N-type to P-type regions. An isolating box incorporates an orthogonal isolator. The 3-D structure places layers of critical profile normal to the growth axis. The orthogonal isolator can include floating elements. The 3-D semiconductor monolith can be manufactured through continuous or quasicontinuous processing in a closed system, such as through MBE or sputter epitaxy.

REFERENCES:
patent: 4412239 (1983-10-01), Iwasaki et al.
patent: 4638344 (1987-01-01), Cardwell, Jr.
Transistors, Warner and Grung, pp. 64-67, Wiley, New York, 1983.
Device Modeling for Advanced Integrated Circuits, A Thesis Submitted to the Faculty of the Graduate School of the University of Minnesota, by Dong-Hyuk Ju, Jul., 1984.
A Feasibility Study of Devices for Three-Dimensional Integrated Circuits, A Thesis Submitted to the Faculty of the Graduate School of the University of Minnesota, by Ronald David Schrimpf.

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