Patent
1995-06-02
1996-11-05
Herndon, Heather R.
G06T 1550
Patent
active
055726364
ABSTRACT:
A mode such that the same texture pattern is stored into a plurality of memories and is processed in parallel by a plurality of drawing processing units and a mode such that different texture patterns are stored into a plurality of memories and either one of the patterns is selected and processed in a time-division manner by a plurality of drawing processing units can be switched. When a pattern is enlarged and drawn at a rate of (1:N), variation values are added and the read-out coordinate values of the texture patterns are distributed, thereby making a block-like boundary inconspicuous. In the case where an underflow or overflow occurs in an adder to interpolate color values of the pixels, the well-known color value of the final pixel position is fixedly generated. In the case where the depth coordinate values of the whole picture plane which are drawn into frame buffers are equal, a single z value is written into a Z register without using a Z buffer. A special high-speed bus is provided as a local bus between a 3-dimensional drawing mechanism and a main memory control unit, thereby enabling the Z buffer area in a main storage unit to be directly accessed.
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Nakamura Hiroshi
Sakuraba Takahiro
Buchel Rudolph
Fujitsu Limited
Herndon Heather R.
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