Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Patent
1996-07-01
1998-10-13
Tung, Kee M.
Computer graphics processing and selective visual display system
Computer graphic processing system
Plural graphics processors
345506, 345522, 345526, G06F 1580
Patent
active
058219498
ABSTRACT:
A 3-D graphics accelerator which includes a command block or preprocessor, a plurality of floating point processors or blocks, and one or more draw processors or blocks. The 3-D graphics accelerator includes a plurality of direct data channels or point-to-point buses which connect the command preprocessor to each of the plurality of floating point processors. The 3-D graphics accelerator also includes a plurality of direct data channels or point-to-point buses which connect the plurality of floating point processors to each of the draw processors. These direct data channels or point-to-point buses provide data transfer throughput similar to prior art designs with improved electrical performance. The plurality of direct data channels or point-to-point buses enables smaller data paths, e.g., 8 bit data paths, while providing similar bandwidth to prior art shared bus designs. The use of these smaller direct data paths also provides better electrical characteristics for the graphical architecture. First, the direct data channel output pins on the command chip are only required to drive a single device, as opposed to driving multiple devices in a shared bus architecture. Also, each of the floating point processors have a reduced number of pins, since each only connects to an 8 bit bus. Further, the direct data paths provide improved connectivity between multiple boards. The improved electrical characteristics also enable the user of higher clock speeds, thus providing increased transfer bandwidth.
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Hood Jeffrey C.
Sun Microsystems Inc.
Tung Kee M.
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