Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2006-12-05
2006-12-05
Phunkulh, Bob A. (Department: 2616)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S389000, C718S102000
Reexamination Certificate
active
07145913
ABSTRACT:
In the present scalable system routing method, received packets are associating with threads for processing the received packets. While a previously received packet is being processed, arrival of an interrupt is checked. If there is an interrupt, a thread is created associating the interrupt is created. Then, a determination of whether the thread associated with the interrupt has a priority that is higher than the priority of a thread associated with the previously received packet is made. If the thread associated with the interrupt has a higher priority than the previously received packet, the thread associated with the previously received packet is saved in a Shared Arena storage area. However, if the thread associated with the interrupt does not have a higher priority than the previously received packet, the thread associated with the interrupt is queued. Because threads are attached to the packets, the threads can now be suspended and resumed without having to disable interrupts, which includes periods during a context switch. As a result, a more flexible and efficient scheduling routing method can be implemented.
REFERENCES:
patent: 5872963 (1999-02-01), Bitar et al.
patent: 6005860 (1999-12-01), Anderson et al.
patent: 6389449 (2002-05-01), Nemirovsky et al.
patent: 6427161 (2002-07-01), LiVecchi
patent: 6477562 (2002-11-01), Nemirovsky et al.
patent: 6738846 (2004-05-01), Slaughter et al.
patent: 6799317 (2004-09-01), Heywood et al.
patent: 6832265 (2004-12-01), Ma et al.
patent: 6910133 (2005-06-01), Cohn
M.M. Michael, M.L. Scott, “Relative Performance of Preemption-Safe Locking and Non-Blocking Synchronization on Multiprogrammed Shared Memory Multiprocessors”, 11th IEEE International Parallel Processing Symposium, Apr. 1997, pp. 267-273.
M.M. Michael, M.L. Scott, “Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms”, 15th Annual ACM Symposium on Principles of Distributed Computing, May 1996, pp. 267-275.
G.C. Hunt, M.M. Michael, S. Parthasarathy, M.L. Scott, “An Efficient Algorithm for Concurrent Priority Queue Heaps”, Information Processing Letters, vol. 60, No. 3, Nov. 1996, pp. 151-157.
M.M. Michael, M.L. Scott, “Implementation of Atomic Primitives on Distributed Shared Memory Multiprocessors”, The First IEEE International symposium on High Performance Computer Architecture, Jan. 1995, pp. 222-231.
M.M. Michael, M.L. Scott, “Nonblocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors”, Journal of Parallel and Distributed Computing, vol. 51, No. 1, May 1998, pp. 1-26.
Craig David
Ha Sungwon
Han Sung-wook
Kim Hwangnam
Polychronopoulos Constantine
Greer Burns & Crain Ltd.
Phunkulh Bob A.
The Board of Trustees of the University of Illinois
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