Third order sigma delta oversampled analog-to-digital converter

Details Third order sigma delta oversampled analog-to-digital converter Third order sigma delta oversampled analog-to-digital converter

1990-07-10

1992-09-15

Logan, Sharon D.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

H03M 300

Patent

active

051481669

ABSTRACT:
An improved modulator network for an interpolative oversampled (sigma-delta) analog-to-digital converter comprises a second-order modulator, which performs double integration of error between its digital output signal and its analog input signal, and a first-order modulator, which performs single integration of error between its digital output signal and an analog signal supplied thereto from the second-order modulator. The modulators supply their output signals to a digital error cancellation circuit which suppresses in the signal supplied to a decimation filter the quantization noise arising in the second-order modulator. The network exhibits significantly reduced sensitivity to the practical nonidealities that normally limit the resolution of analog-to-digital converters of this type, i.e., component matching, amplifier nonlinearity, finite gain, settling time, and signal dynamic range.

REFERENCES:
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patent: 4862169 (1989-08-01), van Bavel et al.
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patent: 4999625 (1991-03-01), Thompson
Longo et al., "A 13 bit ISDN-band Oversampled ADC using Two-Stage Third Order Noise Shaping", IEEE Custom Integrated Circuits Conference, 1988.
IEEE International Symposium on Circuits and Systems, vol. 1 of 3, Portland Hilton, Portland, Oreg., May 8-11, 1989, pp. 247-249.

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