Thinned semiconductor wafer and die and corresponding method

Details Thinned semiconductor wafer and die and corresponding method Thinned semiconductor wafer and die and corresponding method

2002-09-06

2004-08-24

Pham, Long (Department: 2814)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

With attachment to temporary support or carrier

C438S455000, C438S458000

Reexamination Certificate

active

06780733

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to semiconductor wafers and dies.
BACKGROUND
Semiconductor manufacturing is well understood in the art. Various methods are known to process a wafer comprised of one or more semiconductor materials to produce a plurality of solid state integrated circuits (as used herein, “solid state integrated circuits” and similar expressions shall be generally understood to refer to a wide range of devices and apparatus, including electric circuits, optical devices, and micro-electronic mechanical systems (MEMS)). In general, significant progress has been made with respect to reducing the area of semiconductor material required to yield such integrated circuits. Such progress has led to a considerable reduction in size of application devices that, in turn, utilize such integrated circuits (such as, for example, cellular telephones, computers, and memory devices).
Unfortunately, a similar progression does not characterize the overall volume for such integrated circuits. Wafer/die depths of no less than 125 to 150 microns are generally considered the minimum height for wafers and dies bearing integrated circuits under ordinary manufacturing conditions. Thinner dimensions tend to result in wafers and dies that are too fragile to reliably handle or manipulate. While such dimensions have been satisfactory for most applications in the past, there are present needs for thinner wafers and/or dies. For example, memory density needs continue to grow. As area improvements in the X-Y domain become more difficult and costly to attain, reduced height requirements offer one avenue for improving memory density for at least some products.


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