Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1997-10-29
1999-04-20
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257676, H01L 2348
Patent
active
058959696
ABSTRACT:
Ends of inner leads are disposed in the vicinity of a peripheral end of a semiconductor chip and a portion of an insulating film tape is affixed to a main surface of the semiconductor chip by an adhesive while other portions of the insulating film tape are affixed to portions of the inner leads by an adhesive. Electrode pads provided in the main surface of the semiconductor chip are electrically connected to the ends of the corresponding inner leads by bonding wires, and the semiconductor chip, the inner leads, the electrode pads, the insulating film tape and the bonding wires are sealed by a resin molding. The thickness of the insulating film tape is smaller than a height from the main surface of the semiconductor chip to an apex of the bonding wire. Surfaces of the ends of the inner leads connected to the bonding wires are positioned lower than the main surface of the semiconductor chip and the inner leads are positioned between the main surface and an opposite surface of the semiconductor chip.
REFERENCES:
patent: 4649415 (1987-03-01), Hebert
patent: 4698660 (1987-10-01), Kubota et al.
patent: 4943843 (1990-07-01), Okinaga et al.
patent: 4996587 (1991-02-01), Hinrichsmeyer et al.
patent: 5018003 (1991-05-01), Yasunaga et al.
patent: 5055912 (1991-10-01), Murasawa et al.
patent: 5072280 (1991-12-01), Matsukura
patent: 5184208 (1993-02-01), Sakuta et al.
patent: 5245215 (1993-09-01), Sawaya
patent: 5252853 (1993-10-01), Michii
patent: 5394010 (1995-02-01), Tazawa et al.
patent: 5446313 (1995-08-01), Masuda et al.
patent: 5723903 (1998-03-01), Masuda et al.
"DRAM TSOP", in Gain 83, Hitachi, Ltd., Nov. 1990, pp. 30-31 (Translation or concise explanation of relevant portions on currently available).
Article Relating to TSOPs/TABs), in Nikkei Microdevices, Feb., 1991, pp. 65-66 (Translation or concise explanation of relevant portions not currently available.
Masuda Masachika
Wada Tamaki
Chaudhuri Olik
Hitachi Ltd., and Hitachi VLSI Engineering Corp.
Kelley Nathan
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