Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
1999-10-18
2001-03-06
Williams, Alexander O. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S707000, C257S712000, C257S675000, C257S796000, C257S717000, C257S725000, C361S799000, C361S800000, C361S707000, C361S761000
Reexamination Certificate
active
06198163
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention pertains to semiconductor packaging in general, and in particular, to a thin, leadframe-type of semiconductor package having an improved heat dissipating capability, improved resistance to penetration by moisture, and an improved down-bond capability by virtue of an enhanced leadframe therefor.
2. Description of the Related Art
Leadframe types of semiconductor packages are well known and widely used throughout the electronics industry to house, mount, and interconnect a variety of types of integrated circuits (“ICs”). An IC is typically formed on a single die, or “chip,” that is cut from a semiconductor wafer containing a large number of identical dies. The dies themselves are relatively small and fragile, and are susceptible to harmful environmental elements, particularly moisture, and accordingly, must be packaged in affordable, yet robust, packages capable both of protecting them and permitting them to be reliably mounted to, for example, a printed circuit board (“PCB”) and interconnected with associated electronic components mounted thereon.
One type of well known and widely used low-profile leadframe IC package is the so-called “thin shrink small outline package,” or “TSSOP,” which typically includes a plurality of leads on each of two sides of a thin, rectangular body. Other types of packages employing leadframes having leads on either two or all four sides of a rectangular body include “lead-on-chip” (“LOC”), “chip-on-lead” (“COL”), “small outline integrated circuit” (“SOIC”), “plastic dual in-line package” (“PDIP”), “shrink small outline package” (“SSOP”), “plastic leaded chip carrier” (“PLCC”) and “quad flat package” (“QFP”) packages.
A representative conventional leadframe
10
and two alternative semiconductor package
12
and
12
′ made from it are illustrated in
FIGS. 5-8
. The conventional leadframe
10
typically includes a plurality of electrically conductive leads
14
that are temporarily held together in a planar arrangement about a central opening
16
during package manufacture by a plurality of expendable longitudinal and lateral tie-bars
18
that form a rectangular frame enclosing the leads. A semiconductor die mounting pad
20
is supported within the central opening
16
by one or more die pad support leads
22
. The leads
14
extend from a first end
26
integral with the rectangular frame to an opposite second end
24
adjacent to, but spaced from, the central opening
16
. The longitudinal tie-bars
18
may include tooling or sprocket holes
28
for accurately positioning and/or advancing the leadframe during the package manufacturing process.
The conventional leadframe
10
is typically die-stamped from a sheet of flatstock metal, such as a copper or aluminum alloy, typically about 0.125-0.250 millimeters (“mm”) in thickness, and may be deployed in the form of a strip of identical, interconnected leadframes, such as those illustrated in
FIGS. 5 and 6
, for either the sequential or simultaneous fabrication of a plurality of packages thereon.
During package manufacture, an IC die
30
is attached to the die pad
20
, typically by solder, a layer of adhesive
32
, or a double-sided adhesive tape. After the die is attached to the pad, wire-bonding pads
34
on top of the die are electrically connected to corresponding ones of the inner ends
24
of the leads
14
by fine, conductive bonding wires
36
to connect power, ground, and signals between the die and the leads. Additionally, some of the pads
34
that serve a grounding function may also be “down-bonded” to the die pad
20
by other conductive bonding wires
38
to ground the die to the die pad.
When wire-bonding is complete, each of the bonded assemblies is placed between the halves of a clam-shell mold (not illustrated) and a protective envelope
40
, typically of a high density epoxy resin, is molded, usually by transfer-molding, over the assembly to enclose and seal the die
30
, the inner ends
24
of the leads
14
, and the wire bonds
36
and
38
against harmful environmental elements (see FIGS.
7
and
8
). After molding, the temporary tie-bars
18
are cut away from the package
12
or
12
′ and discarded, their function having been assumed by the rigid epoxy envelope
40
, and the outer ends
26
of the leads
14
are left exposed by the envelope
40
for interconnection of the package with other, associated circuitry (not illustrated).
A problem increasingly encountered in the semiconductor packaging industry today relates to the amount of heat experienced by the device during manufacture and assembly, as well as that generated by the device during operation, and the ability of the package to spread that heat uniformly and dissipate it to the environment effectively. As electronic devices grow more compact, yet faster and more functional, the problem increasingly becomes one of getting rid of more heat from packages that are the same, or increasingly, smaller in size, and this is generally the case not only for leadframe types of packages, but others as well.
It may be noted in the conventional leadframe package
12
illustrated in cross-section in
FIG. 7
that the support leads
22
that support the die pad
20
within the central opening
16
have been given a “down-set,” i.e., angled downwardly, such that the die pad
20
is vertically displaced below the plane of the leads
14
. This down-set places the die
30
closer to the bottom of the package. Since the thermal resistance between the die and a heat-sinking surface
42
to which the package is mounted is proportional to the thickness of the material between them, this down-set reduces that resistance, thereby affording the package
12
a greater heat dissipating capability than packages without such a down-set.
The down-set die pad also provides two other, non-thermal benefits; namely, it reduces the overall height of the package
12
, which is of interest to package designers faced with a requirement for thinner, more compact packages, and it also reduces the length of the bonding wires
36
extending between the die
20
and the leads
14
of the leadframe. In some applications, such as high-frequency and/or high-power applications, this reduction in conductor length improves the electrical performance of the packaged device.
The leadframe package
12
′ illustrated in
FIG. 8
shows an alternate, “deep down-set” die pad embodiment in which the bottom surface of the die pad
20
is exposed through the bottom surface of the epoxy envelope
40
. This not only further reduces the height of the package
12
′, the length of the bonding wires
36
, and the thermal resistance between the die
30
and the surface
42
of a heat sink, but also enables the die pad
20
to be thermally coupled more directly to the heat sink surface by an efficient conductor of heat, for example, by a layer
44
of solder or a thermally conductive adhesive. Thus, this structure might be thought to represent an optimum solution for the problem of dissipating heat from a small outline, low-profile leadframe package. However, for the reasons discussed below, this configuration also creates some packaging problems that, to a large extent, offset the thermal benefits that it yields.
One of these relates to the resistance of the package to penetration by harmful moisture. It may be noted in the prior-art leadframe package
12
′ having an exposed die pad
20
shown in
FIG. 8
that a seam
46
is defined at the interface of the die pad and the epoxy plastic envelope
40
. Since a perfect adhesion between the die pad and the envelope along the entire length of the seam
46
is impractical, the seam may define the locus of one or more microscopic cracks for the entry of moisture.
So long as the moisture does not reach the die
30
, this does not present an immediate problem. However, it does create a longer-term problem with repeated high-low temperature cycling of the device, in that any moisture trapped in the cracks at a low temperature will vaporize, and
Boland Bradley David
Crowley Sean Timothy
Amkor Technology Inc.
Lawrence Don C.
Skjerven Morrill & MacPherson LLP
Williams Alexander O.
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