Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1999-09-23
2002-03-12
Gaffin, Jeffrey (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S765000, C361S766000, C361S792000, C361S795000, C174S255000, C174S256000, C174S257000, C174S258000, C029S830000, C029S832000, C029S841000, C029S846000
Reexamination Certificate
active
06356455
ABSTRACT:
The present invention is directed to thin electronic circuitry which provides resistors, capacitors, interconnecting circuitry and optional inductors and to a method of manufacture of such structures.
BACKGROUND OF THE INVENTION
There is a continuing interest in printed circuitry miniaturization. In most printed circuit boards in use, circuitry traces are printed by conventional methods, particularly photoresist techniques. Accessory components such as capacitors and resistors are frequently provided as discrete components and soldered onto the printed circuitry, either manually or robotically. These components occupy “real estate” on the printed circuit board and may be difficult or expensive to apply to the board.
Accordingly, structures have been proposed in which components such as capacitors and/or resistors are provided along with circuitry traces by circuitization procedures.
Examples of such structures are found in U.S. Pat. Nos. 5,079,069, 5,155,655, 5,161,086, 5,261,153, 5,347,258, and 5,466,892, the teachings of each of which are incorporated herein by reference. Typically, a plurality of such structures are laminated together with dielectric material to form multi-layer printed circuit boards.
The present invention is directed to a method of forming a thin, circuitized laminate structure that provides capacitors, resistors, and conductive elements that include circuitry traces and optional inductors and to the thin circuitized laminate structure formed therefrom.
SUMMARY OF THE INVENTION
In accordance with the method of the invention, there is provided a first conductive metal foil to which is laminated an embeddable dielectric material layer and a second conductive metal foil which is coated on one side with a resistive material layer, the resistive material layer on the second foil having a thickness less than that of the embeddable dielectric material layer on the first foil. The resistive material layer is circuitized to form discrete patches of resistive material. Then the two structures are laminated together with the resistive material layers being embedded into the embeddable dielectric material layer without the resistive material patches contacting the first foil. At this point, either the first or the second foil is circuitized, providing interconnecting circuitry traces and optional electrical components such as inductors. To support the structure, the circuitized foil is embedded in dielectric material such as glass-filled epoxy known as “prepreg”, this material supporting the structure during subsequent processing. With the structure so supported, the other foil is then circuitized and this side too may be embedded in dielectric material. Several such structures may be laminated together to form a multi-layer printed circuit board, the several layers being electrically interconnected by via holes in conventional manner.
REFERENCES:
patent: 3909680 (1975-09-01), Tsunashima
patent: 3913224 (1975-10-01), Preissinger et al.
patent: 4870746 (1989-10-01), Klaser
patent: 5144536 (1992-09-01), Tsukada et al.
patent: 5172304 (1992-12-01), Ozawa et al.
patent: 5466892 (1995-11-01), Howard et al.
patent: 6021050 (2000-02-01), Ehman et al.
Gaffin Jeffrey
Morton International Inc.
Vigushin John B.
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