1989-11-30
1991-08-06
James, Andrew J.
357 4, 357 237, 357 59, H01L 2992, H01L 2712, H01L 2701, H01L 2904
Patent
active
050381849
ABSTRACT:
This disclosure relates to semiconductor varactors, such as thin film poly-Si varactors, which have larger effective gate areas in accumulation than in depletion, together with capacitive switching ratios which are essentially determined by the ratio of their effective gate area in accumulation to their effective gate area in depletion. To that end, such a varactor has a fully depletable active semiconductor layer, such as a thin poly-Si film, and is constructed so that at least a part of its active layer is sandwiched between a relatively thin dielectric layer and a relatively thick dielectric layer. The thin dielectric layer, in turn, is sandwiched between the active semiconductor layer and a gate electrode. Furthermore, one or more ground electrodes are electrically coupled to laterally offset portions of the active semiconductor layer in partial overlapping alignment with the gate electrode. In keeping with this invention, the capacitance per unit surface area of the thin dielectric layer is so much greater than the capacitance per unit surface area of the thick dielectric layer that the series capacitance of the depleted active semiconductor layer and the thick dielectric layer negligibly contribute to the capacitance of the varactor when it is operating in its depletion mode. Top-gate and bottom-gate embodiments having ground electrodes which are coplanar with the active semiconductor layer, ground electrodes which are in a plane adjacent to the active semiconductor layer, segmented gate electrodes and segmented ground electrodes, and continuous gate electrodes and segmented ground electrodes are disclosed.
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Chiang Anne
Elrod Scott A.
Hadimioglu Babur
Huang Tiao-Yuan
Oki Takamasa J.
Deal Cynthia S.
James Andrew J.
Xerox Corporation
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