Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Patent
1998-05-08
2000-12-26
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
257327, 257393, H01L 2904
Patent
active
061663980
ABSTRACT:
A method of forming a thin film transistor includes, a) forming a thin film transistor layer of semiconductive material; b) providing a gate operatively adjacent the thin film transistor layer; c) forming at least one electrically conductive sidewall spacer over at least one lateral edge of the gate, the spacer being electrically continuous therewith; and d) providing a source region, a drain region, a drain offset region, and a channel region in the thin film transistor layer; the drain offset region being positioned operatively adjacent the one electrically conductive sidewall spacer and being gated thereby. The spacer is formed by anisotropically etching a spacer forming layer.
REFERENCES:
patent: 4714519 (1987-12-01), Pfiester
patent: 4868617 (1989-09-01), Chiao et al.
patent: 4945067 (1990-07-01), Huang
patent: 5091763 (1992-02-01), Sanchez
patent: 5124769 (1992-06-01), Tanaka et al.
patent: 5262655 (1993-11-01), Ashida
patent: 5290720 (1994-03-01), Chen
patent: 5358879 (1994-10-01), Brady et al.
patent: 5418392 (1995-05-01), Tanabe
patent: 5446304 (1995-08-01), Sameshima et al.
patent: 5475238 (1995-12-01), Hamada
patent: 5548132 (1996-08-01), Batra et al.
patent: 5550397 (1996-08-01), Lifshitz et al.
patent: 5593909 (1997-01-01), Han et al.
patent: 5600153 (1997-02-01), Manning
patent: 5612234 (1997-03-01), Ha
patent: 5659183 (1997-08-01), Manning et al.
patent: 5767530 (1998-06-01), Ha
patent: 5793058 (1998-08-01), Han et al.
patent: 5821584 (1998-10-01), Manning et al.
patent: 5835172 (1998-11-01), Yeo et al.
patent: 5903013 (1999-05-01), Park
patent: 5936262 (1999-08-01), Batra et al.
T. Zhao et al., IEDM '93 Proc., p. 393, "A Novel Floating Gate Spacer Polysilicon TFT."
Abstract; Batra, S., "Development of Drain-Offset (DO) TFT Technology for High Density SRAMs", Extended Abstracts, Fall ECS Meeting, Miami, FL, Oct. 9-14, 1994), pp. 677-678.
Furuta, H. et al., "Hot-Carrier Induced Ion-Ioff Improvement of Offset PMOS TFT", NEC Corporation, undated, pp. 27-28.
Tanaka, K. et al., "Field-Induction-Drain (FID) Poly-SI TFTs with High On/Off Current Ratio", Extended Abstracts 22nd Conference (1990 International) on Solid State Devices and Materials, Sendai, 1990, pp. 1011-1014.
Hashimoto, T. et al., "Thin Film Effects of Double-Gate Polysilicon MOSFET", Extended Abstracts 22nd Conference (1990 International) on Solid State Devices and Materials, Sendai, 1990, pp. 393-396.
Hayden, J., et al., "A High-Performance Quadruple Well, Quadruple Poly BiCMOS Process for Fast 16Mb SRAMs", IEDM 1992, pp. 819-822.
Banerjee Sanjay
Batra Shubneesh
Jung Le-Tien
Manning Monte
Hardy David
Micro)n Technology, Inc.
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