Thin film transistor with self-aligned bottom gate

Details Thin film transistor with self-aligned bottom gate Thin film transistor with self-aligned bottom gate

1996-08-02

1997-09-02

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Field effect device in non-single crystal, or...

257 72, H01L 29786

Patent

active

056635788

ABSTRACT:
A simple method of making a thin film transistor (TFT) on a substrate with an insulating surface layer is disclosed. A layer of dopant source layer is deposited on the insulating layer, followed by defining a gate stack consisting of a gate polysilicon, gate insulator and a protective polysilicon using the dopant source layer as an etch stop. Sidewall spacers are formed in contact with the gate stack. A TFT body polysilicon is deposited and patterned, forming thereby the source and drain regions in a self-aligned manner. By heating, the dopants from the dopant source layer are driven into the source/drain and to part of the off-set regions of the body polysilicon layer while simultaneously also doping the gate polysilicon.

REFERENCES:
patent: 4488348 (1984-12-01), Jolly et al.
patent: 4603468 (1986-08-01), Lam
patent: 4628589 (1986-12-01), Sundaresan
patent: 4987092 (1991-01-01), Kobayashi et al.
patent: 5024959 (1991-06-01), Pfiester
patent: 5158898 (1992-10-01), Hayden et al.
patent: 5262655 (1993-11-01), Ashida

Affiliated with

Also associated with

Rating

Thin film transistor with self-aligned bottom gate does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Thin film transistor with self-aligned bottom gate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin film transistor with self-aligned bottom gate will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-311510