Thin film transistor with reduced leakage current

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

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257 65, 257 69, 257393, 257903, 365156, H01L 2910, H01L 2906, G11C 1100

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052818284

ABSTRACT:
A thin film transistor (TFT) capable of reducing the leakage current on the occasion when the transistor is OFF and lowering the resistance of an interconnection layer connected to source/drain regions and a method of manufacturing the same are disclosed. In the thin film transistor, the length in the channel width direction of a polycrystalline silicon film 15 in junction parts 15c of a pair of source/drain regions 15b and a channel region 15a is smaller than the length in the channel width direction of polycrystalline silicon film 15 in source/drain regions 15b. Accordingly, the leakage current generated in junction parts 15c on the occasion when the TFT is OFF is reduced. In addition, it is unnecessary to reduce the length in the channel width direction of source/drain regions 15b, so that the resistance of an interconnection layer connected to source/drain regions 15b is lowered as compared to the conventional one.

REFERENCES:
patent: 4404578 (1983-09-01), Takafuji et al.
patent: 4582395 (1986-04-01), Morozumi
patent: 4633284 (1986-12-01), Hansell et al.
patent: 5162892 (1992-11-01), Hayashi et al.
C. E. Chen, "Stacked CMOS SRAM Cell", IEEE Electron Device Letters, vol. EDL-4, No. 8 (1983), pp. 272-274.
K. Tsutsumi et al., "A Memory Cell with Polysilicon Thin Film Transistor (TFT) for a 4Mbit SRAM", LSI Research and Development Laboratory, Mitsubishi Electric Corporation, Denshi Joho Tsushin Gakkai Gijyutsu Kenkyu Kokoku, vol. 89, No. 67 (1989).

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