Thin film transistor with conductive layer and static RAM with t

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

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257 60, 257351, 257903, H01L 2702

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active

054101654

ABSTRACT:
A thin film transistor includes a semiconductor thin film formed with a source region and a drain region at opposite end portions thereof and having an offset region near at the drain region, a gate electrode formed above the region between the source region and the offset region of the semiconductor thin film, with a gate insulating film being interposed, and a conductive layer formed above the gate electrode or under the semiconductor thin film, with an insulating film being interposed, the conductive layer being applied with generally the same potential as the gate electrode, wherein the resistance value of the offset region is controlled by the potential of the conductive layer. The gate electrode may be formed under the semiconductor thin film. In this case, the conductive layer is formed above the semiconductor thin film or under the gate electrode, with an insulating film being interposed. An SRAM is also provided which uses a thin film transistor constructed as above.

REFERENCES:
patent: 4748485 (1988-05-01), Vasudev
patent: 4984040 (1991-01-01), Yap
patent: 4984041 (1991-01-01), Hack et al.
1991 Symposium on VLSI Technology. Digest of Technical Papers, pp. 23-24 --K. Tsutsumi et al. "A High-Performance SRAM Memory Cell with LDD-TFT Loads".
1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, pp. 58-59 --Michael R. Splinter et al. "High Voltage SOS/MOS Devices and Circuit Elements".

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