Thin film transistor, method for manufacturing same, and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

Reexamination Certificate

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C257S240000, C257S241000, C257S243000, C257S270000, C257S286000, C257S287000, C438S147000, C438S193000, C438S195000, C438S284000

Reexamination Certificate

active

06888182

ABSTRACT:
A thin film transistor of the present invention is provided with (i) a plurality of divided channel regions formed under a gate electrode, and (ii) divided source regions and divided drain regions between which each of the divided channel regions is sandwiched, the divided source regions being connected with one another, and the divided drain regions being connected with one another. Here, the divided channel regions are so arranged that a spacing between the divided channel regions is smaller than a channel divided width which is a width of one divided channel region, the channel divided width is not more than 50 μm, and the spacing is not less than 3 μm. With this arrangement, it is possible to provide a thin film transistor capable of obtaining reliability with reducing the variation in threshold voltage by reducing the self-heating at the channel regions, as well as capable of reducing the increase of a layout area.

REFERENCES:
patent: 5989940 (1999-11-01), Nakajima
patent: 6118148 (2000-09-01), Yamazaki
patent: 6333520 (2001-12-01), Inoue
patent: 6498376 (2002-12-01), Miyagi et al.
patent: 06-123896 (1994-05-01), None
patent: 09-074205 (1997-03-01), None
patent: 11-097701 (1999-04-01), None
patent: 2003-308038 (2003-10-01), None
patent: 2003-308052 (2003-10-01), None

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