Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
1998-07-28
2001-03-20
Saadat, Mahshid (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S066000
Reexamination Certificate
active
06204520
ABSTRACT:
BACKGROUND OF THE INVENTION
This application claims the benefit of Korean Application Nos. 97-35754, filed on Jul. 29, 1997 and 98-1472, filed Jan. 20, 1998, which are hereby incorporated by reference.
1. Field of Invention
The present invention relates to a thin film transistor (TFT), liquid crystal display (LCD) and fabricating methods thereof, and more particularly a TFT having source/drain lines on which an insulating layer and an active layer are located and lie on an insulated substrate.
2. Discussion of Related Art
FIGS. 1A
to
1
E show cross-sectional views of a method of fabricating a TFT having coplanar structure and LCD having a storage capacitor according to first prior art.
Referring to
FIG. 1A
, a buffer layer
11
is deposited on a glass substrate
100
of an insulated substrate. In this case, the buffer layer
11
prevents impurities of the glass substrate
100
from penetrating into a silicon layer during the crystallization of amorphous silicon by both depositing and annealing amorphous silicon. Then, an active layer
12
is formed by etching a crystallized amorphous silicon layer, which is crystallized by laser annealing after the amorphous silicon layer has been deposited on the first insulating layer
11
through photolithography. To form a first storage electrode
12
T of a storage capacitor, a selective impurity doping process is carried out by using a photoresist pattern PR on the active layer
12
.
Referring to
FIG. 1B
, a second insulating layer and a conductive layer are formed in turn on the disclosed surface. A second storage electrode
14
T corresponding to the gate electrode
14
G and a gate line(not shown in the drawing) is formed by etching the conductive layer. A gate insulating layer
13
is formed by etching the second insulating layer by using the second storage electrode
14
T as a mask.
Referring to
FIG. 1C
, a source region
12
S and a drain region
12
D are formed in the active layer
12
by doping the entire disclosed surface with impurity. In this case, the gate electrode
14
G defines a channel region
12
C which is under the gate electrode
14
G and in the active layer
12
by blocking impurity, wherein the drain region
12
D is connected to the first storage electrode
12
T.
Referring to
FIG. 1D
, a third insulating layer
15
is formed on the entire disclosed surface. A first contact hole disclosing the source and drain region
12
S and
12
D of the active layer
12
is formed by etching the third insulating layer
15
through photolithography. After another conductive layer has been deposited on the entire disclosed surface, a source electrode
16
S connected to the source region
12
S, a data line(not shown in the drawing) and a drain electrode
16
D are formed by etching the conductive layer through photolithography.
Referring to
FIG. 1E
, a fourth insulating layer is deposited on the entire disclosed surface. A second contact hole disclosing the drain electrode
16
D is formed by etching the fourth insulating layer
17
through photolithography. Then, a transparent conductive layer is deposited on the entire disclosed surface. A pixel electrode
18
connected to the drain electrode
16
D is formed by etching the transparent conductive layer through photolithography.
As explained above, the first prior art requires a step of depositing an insulating layer for forming a buffer layer in order to prevent impurities of a glass substrate from penetrating into a silicon layer during the crystallization of amorphous silicon by depositing and annealing amorphous silicon. The step of depositing the insulating layer is complicated and increases the manufacturing cost. Moreover, the above step also requires two photolithography processes to form two contact holes. The photolithography process is carried out by a series of complicated and fine steps, such as masking, applying photoresist, performing exposure and development, which affects productivity and integrity of the product. A major factor in the LCD production is the simplification of fabricating process by means of reducing the number of such photo-etch and the steps of forming insulating layers.
FIG. 2
shows a cross-sectional view of TFT having a staggered structure according to second prior art.
A source electrode
21
S and a drain electrode
21
D are formed on an insulated substrate
200
and then an active layer
23
is formed connected to the electrodes
21
S and
21
D. The active layer may be formed by the following steps of depositing an amorphous silicon layer on an entire disclosed surface, crystallizing the amorphous silicon layer by laser annealing and etching the crystallized silicon layer. A source region
23
S and a drain region
23
D are formed in the active layer
23
by an impurity-doping process after a gate insulating layer
24
and a gate electrode
25
have been formed in turn on a certain part of the active layer
23
. An insulating layer
26
then covers the entire disclosed surface. A contact hole disclosing the drain region
23
D is formed in the insulating layer
26
. A pixel electrode
27
connected to the drain region
23
D is formed on the insulating layer
26
.
In the above-mentioned second prior art, an amorphous silicon layer is crystallized by annealing after the amorphous silicon layer covering the electrodes of source
21
S and drain
21
D have been deposited. Accordingly, the step or height difference increases when the thickness of the source and the drain electrodes are increased in order to reduce resistance of a conductive line. So a silicon layer on the part of the step might become open or exposed when the amorphous silicon is abnormally deposited on the electrodes or laser-annealed. Moreover, the crystal characteristics of a part where silicon contacts with a metal electrode are inferior to that of the other part where silicon is intact. Hence, the current characteristic of TFT is rendered inferior.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a TFT, LCD and fabricating methods that substantially obviate one or more of the problems due to limitations and disadvantages of the prior art.
The object of the present invention is to provide a TFT having a structure of BBC(Buried Bus Coplanar) by forming a source/drain line on a substrate and by forming a buffer layer which covers the source/drain line and is required for the crystallization of silicon, simplifying the process by means of reducing the deposition steps which are fewer than in prior art. The BBC structure of the TFT has a source/drain line on a substrate, an insulating layer covering the source/drain line and the entire disclosed surface and a coplanar structure on the insulating layer.
Another object of the present invention is to provide a data line in the TFT of the BBC structure having low resistance applicable to a wide-screen by means of increasing the thickness of both the buffer layer and the source/drain line.
Additional features and advantages of the invention will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a thin film transistor of the invention includes a substrate, a source and a drain electrode on the substrate, a buffer layer covering the source and the drain electrodes and a disclosed surface, an active layer on the buffer layer wherein the active layer has a source region, a channel region and a drain region, a gate insulating layer on the active layer, and a gate electrode on the gate insulating layer.
In another aspect of the present invention, a liquid crystal display includes an insulated substrate, a data line on the insulated substrate, a buffer layer covering the data line, an active layer
Ha Yong-Min
Yeo Joo-Cheon
Baumeister Bradley W.
LG. Philips LCD Co. Ltd.
Long Aldridge & Norman
Saadat Mahshid
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