Thin film transistor array with light shield layer

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S059000, C349S041000, C349S110000

Reexamination Certificate

active

06249011

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film transistor array and, more particularly, to a thin film transistor array and a method for producing the same which allows for effectuating a correction of an interruption in signal metalization lines.
2. Description of the Related Art
One of the important factors in a thin film transistor array is to improve yield. In particular, only one interruption can make the thin film transistor array defective and thus it is important to reduce the occurrence of interruptions.
Furthermore, when comparing scanning lines with signal lines, since the scanning lines are formed on a transparent insulating substrate initially, they produce comparatively fewer interruptions. In contrast, when a gate insulating film underlying the signal lines is formed by means of plasma CVD or the like, foreign particles are captured in the gate insulating film at the time of forming and the foreign particles once captured are frequently not removed in subsequent processes such as in a washing process. Consequently, this causes irregularities to be formed on the gate insulating film and thus interruptions in the signal lines occur comparatively frequently.
Therefore, in particular, reducing interruptions in the signal lines is an important factor for improvement in yield.
For this purpose, a technique has been conventionally employed such that correction wirings are provided so as to enclose regions of pixel electrodes disposed in a matrix fashion on a thin film transistor array.
However, according to this conventional technique, since the correction wirings are formed so as to enclose the outside of a region in which a pixel electrode is disposed and thus wirings are longer compared with scan and signal lines, there is a problem in that the wirings have higher resistance.
Furthermore, there is another problem that in cases where a plurality of interruptions occurring in one line are corrected by using a correction wiring, a signal cannot be supplied to a portion in between the interruption points, resulting, finally, in an interruption.
Accordingly, for example, Japanese Laid-Open Patent Publication No. Hei-2-254419 discloses a technique for correcting interruptions in wirings by using light shielding films.
FIG. 1
shows a plan view showing a matrix display device according to the publication.
Referring to
FIG. 1
, there are provided conductive light shielding films
21
with which the substantially entire surface of a substrate is covered except the central region of a pixel electrode
26
. These conductive light shielding films
21
overlap with the peripheral portion of the pixel electrode
26
, signal lines
24
, and scanning lines
25
via an insulating film. Thus, in cases where an interruption occurs in scanning lines or signal lines, two portions overlapping between a wirings and conductive light shielding films
21
across the interruption point are irradiated with a laser beam to make the wirings and the conductive film
21
electrically continuous, thereby effectuating a correction of the interruption.
However, according to this conventional technique, there is a problem in that an additional load is imposed on the process and degradation in display quality is induced from the viewpoint of the production process of thin film transistors (TFT) and the display quality of the thin film transistor array.
That is, first, it is necessary to provide an additional step for forming the conductive light shielding films
21
. The formation of the conductive light shielding films
21
requires a series of processes such as exposure or development in film formation or photolithography, leading to an increased load in the process and disadvantages in terms of cost and yield.
Furthermore, there is another problem in that large areas overlapping between the conductive light shielding films
21
and the signal lines
24
, scanning lines
25
, and the peripheral portion of the pixel electrode
26
via the insulating film create parasitic capacitance among the scanning lines
25
, signal lines
24
, pixel electrode
26
, and the conductive light shielding films
21
. That is, the higher the capacitance of the scanning lines
25
and the signal lines
24
, the larger the time constant of the scanning lines
25
and the signal lines
24
becomes, resulting in heavily redundant scan signals or data signals.
For this reason, display is adversely affected such that electrical charge is insufficiently written into the pixel electrode
26
or written conditions become different in the pixel electrodes
26
that are coupled to the same wirings, depending on the distance from the input of signals.
Still furthermore, there is another problem that the capacitive coupling between the pixel electrode
26
and the signal lines
24
or the scanning lines
25
causes the potential of the pixel electrode
26
that holds a predetermined amount of electrical charge to be affected by a variation in the potential of signals inputted to the scanning lines
25
or signal lines
24
to result in being out of synchronization, leading to a defective display.
Moreover, Japanese Laid-Open Patent Publication No. Hei-9-325354 discloses a method for correcting an interruption by laser beam welding to connect a scanning line by bypassing the interruption point in the scanning line via an accumulative capacitance electrode.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a thin film transistor array and a method for producing the same that allows for correcting an interruption in a signal line without increasing load to the process and adversely affecting display.
The thin film transistor array according to the present invention comprises, on a transparent insulating substrate comprised of glass or the like, a plurality of scanning lines formed of a first conductive film, a plurality of signal lines formed of a second conductive film, pixel electrodes formed on a gate insulating film in a region enclosed with adjacent scanning lines and adjacent signal lines, thin film transistors coupled to the pixel electrodes, and light shielding films forming light shielding overlap portions comprised of the first conductive film and overlapping with peripheral portions facing the signal lines of respective pixel electrodes via the gate insulating film. The light shielding film has portions near the both ends thereof along the signal line projected toward a side of the signal line to form correction overlap portions which overlap the signal lines via the gate insulating film.
Accordingly, in cases where an interruption occurs in the signal lines, the correction overlap portion between the light shielding film and the signal line across the interruption point is irradiated with a laser beam, thereby allowing for making the signal line and the light shielding film electrically continuous and thus effectuating a correction of the interruption.
A first effect of the present invention is that the yield of the products can be improved drastically by effectuating repairs of interruptions without increasing load to the process since the light shielding films formed of the first conductive film that forms scanning lines and the like require no additional process.
A second effect of the present invention is that degradation in display quality due to an increase in the time constant of wirings can be avoided since the correction of an interruption by laser irradiation can be effectuated with an area of the correction overlap portion of a few square micrometers, so that the areas of the correction overlap portions between the signal line and the light shielding film can be made smaller and thus the parasitic capacitance between the signal line and the pixel electrode can be made small.
A third effect of the present invention is that reduced parasitic capacitance between the signal line and the pixel electrode causes an influence of variation in the potential of data signals to decrease, for which the pixel electrode is to be subjected, and thus

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