Thin film transistor array panel and method of manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S059000, C257SE29314, C349S042000, C349S043000

Reexamination Certificate

active

11010151

ABSTRACT:
A plurality of gate lines having gate electrodes are formed on a substrate and a semiconductor layer is formed on a gate insulating layer covering the gate lines. A plurality of data lines intersecting the gate lines are formed on the gate insulating layer and a plurality of drain electrodes are formed extending parallel with and adjacent to the data lines. Furthermore, a plurality of storage capacitor conductors are formed to be connected to the drain electrodes and to overlap an adjacent gate line. A passivation layer made of an organic material is formed on the above structure and has a contact hole. Furthermore, a plurality of pixel electrodes are formed to be electrically connected to the drain electrodes through the contact hole.

REFERENCES:
patent: 2002/0180900 (2002-12-01), Chae et al.
patent: 2004/0007704 (2004-01-01), Kim
patent: 2004/0113149 (2004-06-01), Kim
patent: 2004/0262611 (2004-12-01), Lai

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